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Yuso KANAMORI Oki MINABE Masaki WAKABAYASHI Hideharu AMANO
At the initial stage of developing parallel machines, a software monitor, which manages communication between host computers, program loading and debugging, is necessary. However, it is often a cumbersome job to develop such a monitoring system especially when the target takes a parallel architecture. To solve this problem, we developed an integrated monitor system called "Pot". "Pot" consists of a system runs on the host computer and simple code on a target machine. In order to reduce the development costs, the program on a target machine is as simple as possible while "Pot" on the host computer itself provides various functions for system development.
Myung Hoon SUNWOO J. K. AGGARWAL
In general, message passing multiprocessors suffer from communication overhead and shared memory multiprocessors suffer from memory contention. Also, data I/O overhead limits performance. In particular, computer vision tasks that require massive computation are strongly affected by these disadvantages. This paper proposes new parallel architectures for computer vision, a Flexibly (Tightly/Loosely) Coupled Multiprocessor (FCM) and a Flexibly Coupled Hypercube Multiprocessor (FCHM) to alleviate these problems. FCM and FCHM have a variable address space memory in which a set of neighboring memory modules can be merged into a shared memory by a dynamically partitionable topology. FCM and FCHM are based on two different topologies: reconfigurable bus and hypercube. The proposed architectures are quantitatively analyzed using computational models and parallel vision algorithms are simulated on FCM and FCHM using the Intel's Personal SuperComputer (iPSC), a hypercube multiprocessor, showing significant performance improvements over that of iPSC.