Extending the very popular tori interconnection networks[1]-[3], Torus-Connected Cycles (TCC) have been proposed as a novel network topology for massively parallel systems [5]. Here, the set-to-set disjoint paths routing problem in a TCC is solved. In a TCC(k,n), it is proved that paths of lengths at most kn2+2n can be selected in O(kn2) time.

This study investigates quasiperiodic bifurcations generated in a coupled delayed logistic map. Since a delayed logistic map generates an invariant closed curve (ICC), a coupled delayed logistic map exhibits an invariant torus (IT). In a parameter region generating IT, ICC-generating regions extend in many directions like a web. This bifurcation structure is called an Arnol'd resonance web. In this study, we investigate the bifurcation structure of Chenciner bubbles, which are complete synchronization regions in the parameter space, and illustrate a complete bifurcation set for one of Chenciner bubbles. The bifurcation boundary of the Chenciner bubbles is surrounded by saddle-node bifurcation curves and Neimark-Sacker bifurcation curves.

Recently Tate pairing and its variations are attracted in cryptography. Their operations consist of a main iteration loop and a final exponentiation. The final exponentiation is necessary for generating a unique value of the bilinear pairing in the extension fields. The speed of the main loop has become fast by the recent improvements, e.g., the Duursma-Lee algorithm and ηT pairing. In this paper we discuss how to enhance the speed of the final exponentiation of the ηT pairing in the extension field F36n. Indeed, we propose some efficient algorithms using the torus T2(F33n) that can efficiently compute an inversion and a powering by 3n + 1. Consequently, the total processing cost of computing the ηT pairing can be reduced by 16% for n=97.

In this letter, we propose "Torus Ring", which is a modified version of 2-level hierarchical ring. The Torus Ring has the same complexity as the hierarchical rings, since the only difference is the way it connects the local rings. It has an advantage over the hierarchical ring when the destination of a packet is the adjacent local ring, especially to the backward direction. Although we assume that the destination of a network packet is uniformly distributed across the processing nodes, the average number of hops in Torus Ring is equal to that of the hierarchical ring. However, the performance gain of the Torus Ring is expected to increase, due to the spatial locality of the application programs in the real parallel programming environment. In the simulation results, latencies of the interconnection network are reduced by up to 19%, with moderate ring utilization ratios.

We have proposed a speculative selection function for adaptive routing, which uses idle cycles of the network physical links to exchange network information between nodes, thus helps to decide the best selection. Previous study on the mesh network showed that SSR gives message selection flexibility that improves network performance by balancing the network traffic in both global and local scopes. This paper evaluates the speculative selection function on 2D torus network with simulation. The simulation compares the network throughput and latency with various traffic patterns. The visualization graphs show how the speculative selection eliminates hotspots and disperses traffic in the global scope. The simulation results demonstrate that by using speculative selection, the network performance is increased by around 7%. Compared to the mesh network, the torus's version has smaller gain due to the high performance nature of the torus network.

A mesh-connected processor array consists of many similar processing elements (PEs), which can be executed in both parallel and pipeline processing. For the implementation of an array of large numbers of processors, it is necessary to consider some fault tolerant issues to enhance the (fabrication-time) yield and the (run-time) reliability. In this paper, we introduce the 1(1/2)-track switch torus array by changing the connections in 1(1/2)-track switch mesh array, and we apply our approximate reconfiguration algorithm to the torus array. We describe the reconfiguration strategy for the 1(1/2)-track switch torus array and its realization using WSI, especially 3-dimensional realization. A hardware realization of the algorithm is proposed and simulation results about the array reliability are shown. These imply that a self-reconfigurable system with no host computer can be realized using our method, hence our method is effective in enhancing the run-time reliability as well as the fabrication-time yield of processor arrays.

In this paper, a simple chaotic circuit using two RC phase shift oscillators and a diode is proposed and analyzed. By using a simpler model of the original circuit, the mechanism of generating chaos is explained and the exact solutions are derived. The exact expression of the Poincare map and its Jacobian matrix make it possible to confirm the generation of chaos using the Lyapunov exponents and to investigate the related bifurcation phenomena.

We consider the problem of embedding complete binary trees into 2-dimensional tori with minimum (edge) congestion. It is known that for a positive integer n, a 2n-1-vertex complete binary tree can be embedded in a (2n/2+1)(2n/2+1)-grid and a 2n/2 2n/2-grid with congestion 1 and 2, respectively. However, it is not known if 2n-1-vertex complete binary tree is embeddable in a 2n/2 2n/2-grid with unit congestion. In this paper, we show that a positive answer can be obtained by adding wrap-around edges to grids, i.e., a 2n-1-vertex complete binary tree can be embedded with unit congestion in a 2n/2 2n/2-torus. The embedding proposed here achieves the minimum congestion and an almost minimum size of a torus (up to the constant term of 1). In particular, the embedding is optimal for the problem of embedding a 2n-1-vertex complete binary tree with an even integer n into a square torus with unit congestion.

In this study, a ring of simple chaotic circuits coupled by inductors is investigated. An extremely simple three-dimensional autonomous circuit is considered as a chaotic subcircuit. By carrying out circuit experiments and computer calculations for two, three or four subcircuits case, various synchronization phenomena of chaos are confirmed to be stably generated. For the three subcircuits case, two different synchronization modes coexist, namely in-phase synchronization mode and three-phase synchronization mode. By investigating Poincar map, we can see that two types of synchronizations bifurcate to quasi-synchronized chaos via different bifurcation route, namely in-phase synchronization undergoes period-doubling route while three-phase synchronization undergoes torus breakdown. Further, we investigate the effect of the values of coupling inductors to bifurcation phenomena of two types of synchronizations.

In this article, we consider a hysteresis oscillator which includes periodic thresholds. This oscillator relates to a model of human's sleep-wake cycles. Deriving a one dimensional return map rigorously, we can clarify existence regions of various periodic attractors in some parameter subspace. Also, we clarify co-existence regions of periodic attractors and existence regions of quasi-periodic attractors. Some of theoretical results are confirmed by laboratory measurements.