IEICE TRANSACTIONS on Communications
DMFQ: Hardware Design of Flow-Based Queue Management Scheme for Improving the Fairness
Summary :
Recently, various types of traffic have increased on the Internet with the development of broadband networks. However, it is difficult to guarantee QoS for each traffic type in current network environments. Moreover, it has been reported that bandwidth can be allocated to flows unfairly, and this can be an important issue for QoS guarantees. Therefore, we have proposed a flow-based queue management scheme, called Dual Metrics Fair Queueing (DMFQ), to improve the fairness and QoS per flow. DMFQ discards arrival packets by considering not only the arrival rate per flow but also the flow succession time. In addition, we have confirmed the effectiveness of DMFQ through several computer simulations. In this paper, we implement DMFQ with hardware for high-speed operation. Concretely, we propose the design policies and show the hardware design results.
- Publication
- IEICE TRANSACTIONS on Communications Vol.E88-B No.4 pp.1413-1423
- Publication Date
- 2005/04/01
- Publicized
- Online ISSN
- DOI
- 10.1093/ietcom/e88-b.4.1413
- Type of Manuscript
- Special Section PAPER (Special Section on Internet Technology V)
- Category
Authors
Keyword
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Norio YAMAGAKI, Hideki TODE, Koso MURAKAMI, "DMFQ: Hardware Design of Flow-Based Queue Management Scheme for Improving the Fairness" in IEICE TRANSACTIONS on Communications,
vol. E88-B, no. 4, pp. 1413-1423, April 2005, doi: 10.1093/ietcom/e88-b.4.1413.
Abstract: Recently, various types of traffic have increased on the Internet with the development of broadband networks. However, it is difficult to guarantee QoS for each traffic type in current network environments. Moreover, it has been reported that bandwidth can be allocated to flows unfairly, and this can be an important issue for QoS guarantees. Therefore, we have proposed a flow-based queue management scheme, called Dual Metrics Fair Queueing (DMFQ), to improve the fairness and QoS per flow. DMFQ discards arrival packets by considering not only the arrival rate per flow but also the flow succession time. In addition, we have confirmed the effectiveness of DMFQ through several computer simulations. In this paper, we implement DMFQ with hardware for high-speed operation. Concretely, we propose the design policies and show the hardware design results.
URL: https://global.ieice.org/en_transactions/communications/10.1093/ietcom/e88-b.4.1413/_p
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@ARTICLE{e88-b_4_1413,
author={Norio YAMAGAKI, Hideki TODE, Koso MURAKAMI, },
journal={IEICE TRANSACTIONS on Communications},
title={DMFQ: Hardware Design of Flow-Based Queue Management Scheme for Improving the Fairness},
year={2005},
volume={E88-B},
number={4},
pages={1413-1423},
abstract={Recently, various types of traffic have increased on the Internet with the development of broadband networks. However, it is difficult to guarantee QoS for each traffic type in current network environments. Moreover, it has been reported that bandwidth can be allocated to flows unfairly, and this can be an important issue for QoS guarantees. Therefore, we have proposed a flow-based queue management scheme, called Dual Metrics Fair Queueing (DMFQ), to improve the fairness and QoS per flow. DMFQ discards arrival packets by considering not only the arrival rate per flow but also the flow succession time. In addition, we have confirmed the effectiveness of DMFQ through several computer simulations. In this paper, we implement DMFQ with hardware for high-speed operation. Concretely, we propose the design policies and show the hardware design results.},
keywords={},
doi={10.1093/ietcom/e88-b.4.1413},
ISSN={},
month={April},}
Copy
TY - JOUR
TI - DMFQ: Hardware Design of Flow-Based Queue Management Scheme for Improving the Fairness
T2 - IEICE TRANSACTIONS on Communications
SP - 1413
EP - 1423
AU - Norio YAMAGAKI
AU - Hideki TODE
AU - Koso MURAKAMI
PY - 2005
DO - 10.1093/ietcom/e88-b.4.1413
JO - IEICE TRANSACTIONS on Communications
SN -
VL - E88-B
IS - 4
JA - IEICE TRANSACTIONS on Communications
Y1 - April 2005
AB - Recently, various types of traffic have increased on the Internet with the development of broadband networks. However, it is difficult to guarantee QoS for each traffic type in current network environments. Moreover, it has been reported that bandwidth can be allocated to flows unfairly, and this can be an important issue for QoS guarantees. Therefore, we have proposed a flow-based queue management scheme, called Dual Metrics Fair Queueing (DMFQ), to improve the fairness and QoS per flow. DMFQ discards arrival packets by considering not only the arrival rate per flow but also the flow succession time. In addition, we have confirmed the effectiveness of DMFQ through several computer simulations. In this paper, we implement DMFQ with hardware for high-speed operation. Concretely, we propose the design policies and show the hardware design results.
ER -
English
