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A Design of the Signal Processing Hardware Platform for Communication Systems

Byung Wook LEE, Sung Ho CHO

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Summary :

In this letter, an efficient hardware platform for the digital signal processing for OFDM communication systems is presented. The hardware platform consists of a single FPGA having 900 K gates, two DSPs with maximum 8,000 MIPS at 1 GHz clock, 2-channel ADC and DAC supporting maximum 125 MHz sampling rate, and flexible data bus architecture, so that a wide variety of baseband signal processing algorithms for practical OFDM communication systems may be implemented and tested. The IEEE 802.16d software modem is also presented in order to verify the effectiveness and usefulness of the designed platform.

Publication
IEICE TRANSACTIONS on Communications Vol.E91-B No.3 pp.939-942
Publication Date
2008/03/01
Publicized
Online ISSN
1745-1345
DOI
10.1093/ietcom/e91-b.3.939
Type of Manuscript
LETTER
Category
Wireless Communication Technologies

Authors

Keyword

OFDM,  IEEE 802.16,  FPGA,  DSP,  platform