IEICE TRANSACTIONS on Communications
Performance Evaluation for Vehicular Speed Response Phase Locked Loop in Ricean Fading Environment
Summary :
Vehicular speed response phase locked loop (VSR-PLL) is a novel circuit to remove a steady-state frequency offset which arises in the receiver with directive antenna. In this paper, the circuit is applied to Ricean fading environment. For the application of VSR-PLL to Ricean statistics channel, the Doppler shift information of direct wave must be obtained because the self-oscillation frequency of VCO is controlled by using the information. This paper describes an estimation method for the Doppler shift of the direct wave, and shows the several results of the performance analysis for the estimation method and proposed VSR-PLL with the method. As a result, we found that the proposed VSR-PLL could reduce the irreducible bit-error rate for QPSK system from about 10-2 to 10-3 on several conditions.
- Publication
- IEICE TRANSACTIONS on Communications Vol.E81-B No.3 pp.609-615
- Publication Date
- 1998/03/25
- Publicized
- Online ISSN
- DOI
- Type of Manuscript
- Category
- Radio Communication
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Masanori HAMAMURA, Shin'ichi TACHIKAWA, "Performance Evaluation for Vehicular Speed Response Phase Locked Loop in Ricean Fading Environment" in IEICE TRANSACTIONS on Communications,
vol. E81-B, no. 3, pp. 609-615, March 1998, doi: .
Abstract: Vehicular speed response phase locked loop (VSR-PLL) is a novel circuit to remove a steady-state frequency offset which arises in the receiver with directive antenna. In this paper, the circuit is applied to Ricean fading environment. For the application of VSR-PLL to Ricean statistics channel, the Doppler shift information of direct wave must be obtained because the self-oscillation frequency of VCO is controlled by using the information. This paper describes an estimation method for the Doppler shift of the direct wave, and shows the several results of the performance analysis for the estimation method and proposed VSR-PLL with the method. As a result, we found that the proposed VSR-PLL could reduce the irreducible bit-error rate for QPSK system from about 10-2 to 10-3 on several conditions.
URL: https://global.ieice.org/en_transactions/communications/10.1587/e81-b_3_609/_p
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@ARTICLE{e81-b_3_609,
author={Masanori HAMAMURA, Shin'ichi TACHIKAWA, },
journal={IEICE TRANSACTIONS on Communications},
title={Performance Evaluation for Vehicular Speed Response Phase Locked Loop in Ricean Fading Environment},
year={1998},
volume={E81-B},
number={3},
pages={609-615},
abstract={Vehicular speed response phase locked loop (VSR-PLL) is a novel circuit to remove a steady-state frequency offset which arises in the receiver with directive antenna. In this paper, the circuit is applied to Ricean fading environment. For the application of VSR-PLL to Ricean statistics channel, the Doppler shift information of direct wave must be obtained because the self-oscillation frequency of VCO is controlled by using the information. This paper describes an estimation method for the Doppler shift of the direct wave, and shows the several results of the performance analysis for the estimation method and proposed VSR-PLL with the method. As a result, we found that the proposed VSR-PLL could reduce the irreducible bit-error rate for QPSK system from about 10-2 to 10-3 on several conditions.},
keywords={},
doi={},
ISSN={},
month={March},}
Copy
TY - JOUR
TI - Performance Evaluation for Vehicular Speed Response Phase Locked Loop in Ricean Fading Environment
T2 - IEICE TRANSACTIONS on Communications
SP - 609
EP - 615
AU - Masanori HAMAMURA
AU - Shin'ichi TACHIKAWA
PY - 1998
DO -
JO - IEICE TRANSACTIONS on Communications
SN -
VL - E81-B
IS - 3
JA - IEICE TRANSACTIONS on Communications
Y1 - March 1998
AB - Vehicular speed response phase locked loop (VSR-PLL) is a novel circuit to remove a steady-state frequency offset which arises in the receiver with directive antenna. In this paper, the circuit is applied to Ricean fading environment. For the application of VSR-PLL to Ricean statistics channel, the Doppler shift information of direct wave must be obtained because the self-oscillation frequency of VCO is controlled by using the information. This paper describes an estimation method for the Doppler shift of the direct wave, and shows the several results of the performance analysis for the estimation method and proposed VSR-PLL with the method. As a result, we found that the proposed VSR-PLL could reduce the irreducible bit-error rate for QPSK system from about 10-2 to 10-3 on several conditions.
ER -
English
