An Improved Closed-Loop Coherent Pseudo-Noise Acquisition Scheme Using an Auxiliary Sequence
Summary :
A rapid Pseudo-Noise (PN) acquisition scheme is proposed. The proposed scheme consists of a phase alignment detector and Voltage Controlled Clock (VCC) loop. The VCC loop is used to control the phase update of the local PN signal. It has an auxiliary signal that provides the loop with two stable locking points as well as the direction of each phase update. The performance of the proposed scheme is evaluated by simulation. Results show that the proposed scheme acquires the phase two to three times faster than the conventional coherent serial scheme, and 1.5 times faster than of that in [10], at a small amount of additional hardware.
- Publication
- IEICE TRANSACTIONS on Communications Vol.E85-B No.3 pp.594-604
- Publication Date
- 2002/03/01
- Publicized
- Online ISSN
- DOI
- Type of Manuscript
- PAPER
- Category
- Wireless Communication Technology
Authors
Keyword
Latest Issue
Copyrights notice of machine-translated contents
The copyright of the original papers published on this site belongs to IEICE. Unauthorized use of the original or translated papers is prohibited. See IEICE Provisions on Copyright for details.
Cite this
Copy
Taweesak SAMANCHUEN, Sawasd TANTARATANA, "An Improved Closed-Loop Coherent Pseudo-Noise Acquisition Scheme Using an Auxiliary Sequence" in IEICE TRANSACTIONS on Communications,
vol. E85-B, no. 3, pp. 594-604, March 2002, doi: .
Abstract: A rapid Pseudo-Noise (PN) acquisition scheme is proposed. The proposed scheme consists of a phase alignment detector and Voltage Controlled Clock (VCC) loop. The VCC loop is used to control the phase update of the local PN signal. It has an auxiliary signal that provides the loop with two stable locking points as well as the direction of each phase update. The performance of the proposed scheme is evaluated by simulation. Results show that the proposed scheme acquires the phase two to three times faster than the conventional coherent serial scheme, and 1.5 times faster than of that in [10], at a small amount of additional hardware.
URL: https://global.ieice.org/en_transactions/communications/10.1587/e85-b_3_594/_p
Copy
@ARTICLE{e85-b_3_594,
author={Taweesak SAMANCHUEN, Sawasd TANTARATANA, },
journal={IEICE TRANSACTIONS on Communications},
title={An Improved Closed-Loop Coherent Pseudo-Noise Acquisition Scheme Using an Auxiliary Sequence},
year={2002},
volume={E85-B},
number={3},
pages={594-604},
abstract={A rapid Pseudo-Noise (PN) acquisition scheme is proposed. The proposed scheme consists of a phase alignment detector and Voltage Controlled Clock (VCC) loop. The VCC loop is used to control the phase update of the local PN signal. It has an auxiliary signal that provides the loop with two stable locking points as well as the direction of each phase update. The performance of the proposed scheme is evaluated by simulation. Results show that the proposed scheme acquires the phase two to three times faster than the conventional coherent serial scheme, and 1.5 times faster than of that in [10], at a small amount of additional hardware.},
keywords={},
doi={},
ISSN={},
month={March},}
Copy
TY - JOUR
TI - An Improved Closed-Loop Coherent Pseudo-Noise Acquisition Scheme Using an Auxiliary Sequence
T2 - IEICE TRANSACTIONS on Communications
SP - 594
EP - 604
AU - Taweesak SAMANCHUEN
AU - Sawasd TANTARATANA
PY - 2002
DO -
JO - IEICE TRANSACTIONS on Communications
SN -
VL - E85-B
IS - 3
JA - IEICE TRANSACTIONS on Communications
Y1 - March 2002
AB - A rapid Pseudo-Noise (PN) acquisition scheme is proposed. The proposed scheme consists of a phase alignment detector and Voltage Controlled Clock (VCC) loop. The VCC loop is used to control the phase update of the local PN signal. It has an auxiliary signal that provides the loop with two stable locking points as well as the direction of each phase update. The performance of the proposed scheme is evaluated by simulation. Results show that the proposed scheme acquires the phase two to three times faster than the conventional coherent serial scheme, and 1.5 times faster than of that in [10], at a small amount of additional hardware.
ER -
English
