This paper presents a design method to minimize energy of both functional units (FUs) and an interconnection network between FUs. To reduce complexity of the interconnection network, data transfers between FUs are classified according to FU types of operations in a data flow graph. The basic idea behind reducing the complexity of the interconnection network is that the interconnection resource can be shared among data transfers with the same FU type of a source node and the same FU type of a destination node. Moreover, an efficient method based on a genetic algorithm is presented.
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Masanori HARIYAMA, Shigeo YAMADERA, Michitaka KAMEYAMA, "Minimizing Energy Consumption Based on Dual-Supply-Voltage Assignment and Interconnection Simplification" in IEICE TRANSACTIONS on Electronics,
vol. E89-C, no. 11, pp. 1551-1558, November 2006, doi: 10.1093/ietele/e89-c.11.1551.
Abstract: This paper presents a design method to minimize energy of both functional units (FUs) and an interconnection network between FUs. To reduce complexity of the interconnection network, data transfers between FUs are classified according to FU types of operations in a data flow graph. The basic idea behind reducing the complexity of the interconnection network is that the interconnection resource can be shared among data transfers with the same FU type of a source node and the same FU type of a destination node. Moreover, an efficient method based on a genetic algorithm is presented.
URL: https://global.ieice.org/en_transactions/electronics/10.1093/ietele/e89-c.11.1551/_p
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@ARTICLE{e89-c_11_1551,
author={Masanori HARIYAMA, Shigeo YAMADERA, Michitaka KAMEYAMA, },
journal={IEICE TRANSACTIONS on Electronics},
title={Minimizing Energy Consumption Based on Dual-Supply-Voltage Assignment and Interconnection Simplification},
year={2006},
volume={E89-C},
number={11},
pages={1551-1558},
abstract={This paper presents a design method to minimize energy of both functional units (FUs) and an interconnection network between FUs. To reduce complexity of the interconnection network, data transfers between FUs are classified according to FU types of operations in a data flow graph. The basic idea behind reducing the complexity of the interconnection network is that the interconnection resource can be shared among data transfers with the same FU type of a source node and the same FU type of a destination node. Moreover, an efficient method based on a genetic algorithm is presented.},
keywords={},
doi={10.1093/ietele/e89-c.11.1551},
ISSN={1745-1353},
month={November},}
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TY - JOUR
TI - Minimizing Energy Consumption Based on Dual-Supply-Voltage Assignment and Interconnection Simplification
T2 - IEICE TRANSACTIONS on Electronics
SP - 1551
EP - 1558
AU - Masanori HARIYAMA
AU - Shigeo YAMADERA
AU - Michitaka KAMEYAMA
PY - 2006
DO - 10.1093/ietele/e89-c.11.1551
JO - IEICE TRANSACTIONS on Electronics
SN - 1745-1353
VL - E89-C
IS - 11
JA - IEICE TRANSACTIONS on Electronics
Y1 - November 2006
AB - This paper presents a design method to minimize energy of both functional units (FUs) and an interconnection network between FUs. To reduce complexity of the interconnection network, data transfers between FUs are classified according to FU types of operations in a data flow graph. The basic idea behind reducing the complexity of the interconnection network is that the interconnection resource can be shared among data transfers with the same FU type of a source node and the same FU type of a destination node. Moreover, an efficient method based on a genetic algorithm is presented.
ER -