5 Gsps Oversampling Analog-to-Digital Converters with Polarity Alternating Feedback Comparator
Summary :
We fabricated and evaluated a second-order ΣΔ ADC with a polarity alternating feedback (PAF) comparator based on 0.4 µm InGaP/InGaAs enhancement and depletion mode high electron mobility transistors (E/D HEMT) technology. We propose a PAF technique for enhancing the sampling frequency and have applied the technique in the design of ADC circuit. The ADC has a signal-to-noise ratio (SNR) of 43 dB when operating at a differential clock frequency of 4.9 GHz, and has a power dissipation of 400 mW.
- Publication
- IEICE TRANSACTIONS on Electronics Vol.E82-C No.3 pp.483-490
- Publication Date
- 1999/03/25
- Publicized
- Online ISSN
- DOI
- Type of Manuscript
- Special Section PAPER (Special Issue on Ultra-High-Speed IC and LSI Technology)
- Category
- Compound Semiconductor Devices
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Takumi MIYASHITA, Alfredo OLMOS, Mizuhisa NIHEI, Yuu WATANABE, "5 Gsps Oversampling Analog-to-Digital Converters with Polarity Alternating Feedback Comparator" in IEICE TRANSACTIONS on Electronics,
vol. E82-C, no. 3, pp. 483-490, March 1999, doi: .
Abstract: We fabricated and evaluated a second-order ΣΔ ADC with a polarity alternating feedback (PAF) comparator based on 0.4 µm InGaP/InGaAs enhancement and depletion mode high electron mobility transistors (E/D HEMT) technology. We propose a PAF technique for enhancing the sampling frequency and have applied the technique in the design of ADC circuit. The ADC has a signal-to-noise ratio (SNR) of 43 dB when operating at a differential clock frequency of 4.9 GHz, and has a power dissipation of 400 mW.
URL: https://global.ieice.org/en_transactions/electronics/10.1587/e82-c_3_483/_p
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@ARTICLE{e82-c_3_483,
author={Takumi MIYASHITA, Alfredo OLMOS, Mizuhisa NIHEI, Yuu WATANABE, },
journal={IEICE TRANSACTIONS on Electronics},
title={5 Gsps Oversampling Analog-to-Digital Converters with Polarity Alternating Feedback Comparator},
year={1999},
volume={E82-C},
number={3},
pages={483-490},
abstract={We fabricated and evaluated a second-order ΣΔ ADC with a polarity alternating feedback (PAF) comparator based on 0.4 µm InGaP/InGaAs enhancement and depletion mode high electron mobility transistors (E/D HEMT) technology. We propose a PAF technique for enhancing the sampling frequency and have applied the technique in the design of ADC circuit. The ADC has a signal-to-noise ratio (SNR) of 43 dB when operating at a differential clock frequency of 4.9 GHz, and has a power dissipation of 400 mW.},
keywords={},
doi={},
ISSN={},
month={March},}
Copy
TY - JOUR
TI - 5 Gsps Oversampling Analog-to-Digital Converters with Polarity Alternating Feedback Comparator
T2 - IEICE TRANSACTIONS on Electronics
SP - 483
EP - 490
AU - Takumi MIYASHITA
AU - Alfredo OLMOS
AU - Mizuhisa NIHEI
AU - Yuu WATANABE
PY - 1999
DO -
JO - IEICE TRANSACTIONS on Electronics
SN -
VL - E82-C
IS - 3
JA - IEICE TRANSACTIONS on Electronics
Y1 - March 1999
AB - We fabricated and evaluated a second-order ΣΔ ADC with a polarity alternating feedback (PAF) comparator based on 0.4 µm InGaP/InGaAs enhancement and depletion mode high electron mobility transistors (E/D HEMT) technology. We propose a PAF technique for enhancing the sampling frequency and have applied the technique in the design of ADC circuit. The ADC has a signal-to-noise ratio (SNR) of 43 dB when operating at a differential clock frequency of 4.9 GHz, and has a power dissipation of 400 mW.
ER -
English
