Vision Chip for Very Fast Detection of Motion Vectors: Design and Implementation
Summary :
This paper gives a detailed presentation of a "vision chip" for a very fast detection of motion vectors. The chip's design consists of a parallel pixel array and column parallel block-matching processors. Each pixel of the pixel array contains a photo detector, an edge detector and 4 bits of memory. In the detection of motion vectors, first, the gray level image is binarized by the edge detector and subsequently the binary edge data is used in the block matching processor. The block-matching takes place locally in pixel and globally in column. The chip can create a dense field of motion where a vector is assigned to each pixel by overlapping 2
- Publication
- IEICE TRANSACTIONS on Electronics Vol.E82-C No.9 pp.1739-1748
- Publication Date
- 1999/09/25
- Publicized
- Online ISSN
- DOI
- Type of Manuscript
- Special Section PAPER (Special Issue on Integrated Electronics and New System Paradigms)
- Category
- Imaging Circuits and Algorithms
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Zheng LI, Kiyoharu AIZAWA, "Vision Chip for Very Fast Detection of Motion Vectors: Design and Implementation" in IEICE TRANSACTIONS on Electronics,
vol. E82-C, no. 9, pp. 1739-1748, September 1999, doi: .
Abstract: This paper gives a detailed presentation of a "vision chip" for a very fast detection of motion vectors. The chip's design consists of a parallel pixel array and column parallel block-matching processors. Each pixel of the pixel array contains a photo detector, an edge detector and 4 bits of memory. In the detection of motion vectors, first, the gray level image is binarized by the edge detector and subsequently the binary edge data is used in the block matching processor. The block-matching takes place locally in pixel and globally in column. The chip can create a dense field of motion where a vector is assigned to each pixel by overlapping 2
URL: https://global.ieice.org/en_transactions/electronics/10.1587/e82-c_9_1739/_p
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@ARTICLE{e82-c_9_1739,
author={Zheng LI, Kiyoharu AIZAWA, },
journal={IEICE TRANSACTIONS on Electronics},
title={Vision Chip for Very Fast Detection of Motion Vectors: Design and Implementation},
year={1999},
volume={E82-C},
number={9},
pages={1739-1748},
abstract={This paper gives a detailed presentation of a "vision chip" for a very fast detection of motion vectors. The chip's design consists of a parallel pixel array and column parallel block-matching processors. Each pixel of the pixel array contains a photo detector, an edge detector and 4 bits of memory. In the detection of motion vectors, first, the gray level image is binarized by the edge detector and subsequently the binary edge data is used in the block matching processor. The block-matching takes place locally in pixel and globally in column. The chip can create a dense field of motion where a vector is assigned to each pixel by overlapping 2
keywords={},
doi={},
ISSN={},
month={September},}
Copy
TY - JOUR
TI - Vision Chip for Very Fast Detection of Motion Vectors: Design and Implementation
T2 - IEICE TRANSACTIONS on Electronics
SP - 1739
EP - 1748
AU - Zheng LI
AU - Kiyoharu AIZAWA
PY - 1999
DO -
JO - IEICE TRANSACTIONS on Electronics
SN -
VL - E82-C
IS - 9
JA - IEICE TRANSACTIONS on Electronics
Y1 - September 1999
AB - This paper gives a detailed presentation of a "vision chip" for a very fast detection of motion vectors. The chip's design consists of a parallel pixel array and column parallel block-matching processors. Each pixel of the pixel array contains a photo detector, an edge detector and 4 bits of memory. In the detection of motion vectors, first, the gray level image is binarized by the edge detector and subsequently the binary edge data is used in the block matching processor. The block-matching takes place locally in pixel and globally in column. The chip can create a dense field of motion where a vector is assigned to each pixel by overlapping 2
ER -
English
