IEICE TRANSACTIONS on Electronics
Highly-Parallel Stereo Vision VLSI Processor Based on an Optimal Parallel Memory Access Scheme
Summary :
In a real-time vision system, parallel memory access is essential for highly parallel image processing. The use of multiple memory modules is one efficient technique for parallel access. In the technique, data stored in different memory modules can be accessed in parallel. This paper presents an optimal memory allocation methodology to map data to be read in parallel onto different memory modules. Based on the methodology, a high-performance VLSI processor for three-dimensional instrumentation is proposed.
- Publication
- IEICE TRANSACTIONS on Electronics Vol.E84-C No.3 pp.382-389
- Publication Date
- 2001/03/01
- Publicized
- Online ISSN
- DOI
- Type of Manuscript
- PAPER
- Category
- Integrated Electronics
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Masanori HARIYAMA, Seunghwan LEE, Michitaka KAMEYAMA, "Highly-Parallel Stereo Vision VLSI Processor Based on an Optimal Parallel Memory Access Scheme" in IEICE TRANSACTIONS on Electronics,
vol. E84-C, no. 3, pp. 382-389, March 2001, doi: .
Abstract: In a real-time vision system, parallel memory access is essential for highly parallel image processing. The use of multiple memory modules is one efficient technique for parallel access. In the technique, data stored in different memory modules can be accessed in parallel. This paper presents an optimal memory allocation methodology to map data to be read in parallel onto different memory modules. Based on the methodology, a high-performance VLSI processor for three-dimensional instrumentation is proposed.
URL: https://global.ieice.org/en_transactions/electronics/10.1587/e84-c_3_382/_p
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@ARTICLE{e84-c_3_382,
author={Masanori HARIYAMA, Seunghwan LEE, Michitaka KAMEYAMA, },
journal={IEICE TRANSACTIONS on Electronics},
title={Highly-Parallel Stereo Vision VLSI Processor Based on an Optimal Parallel Memory Access Scheme},
year={2001},
volume={E84-C},
number={3},
pages={382-389},
abstract={In a real-time vision system, parallel memory access is essential for highly parallel image processing. The use of multiple memory modules is one efficient technique for parallel access. In the technique, data stored in different memory modules can be accessed in parallel. This paper presents an optimal memory allocation methodology to map data to be read in parallel onto different memory modules. Based on the methodology, a high-performance VLSI processor for three-dimensional instrumentation is proposed.},
keywords={},
doi={},
ISSN={},
month={March},}
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TY - JOUR
TI - Highly-Parallel Stereo Vision VLSI Processor Based on an Optimal Parallel Memory Access Scheme
T2 - IEICE TRANSACTIONS on Electronics
SP - 382
EP - 389
AU - Masanori HARIYAMA
AU - Seunghwan LEE
AU - Michitaka KAMEYAMA
PY - 2001
DO -
JO - IEICE TRANSACTIONS on Electronics
SN -
VL - E84-C
IS - 3
JA - IEICE TRANSACTIONS on Electronics
Y1 - March 2001
AB - In a real-time vision system, parallel memory access is essential for highly parallel image processing. The use of multiple memory modules is one efficient technique for parallel access. In the technique, data stored in different memory modules can be accessed in parallel. This paper presents an optimal memory allocation methodology to map data to be read in parallel onto different memory modules. Based on the methodology, a high-performance VLSI processor for three-dimensional instrumentation is proposed.
ER -
English
