A Contention-Free DOMINO Logic for Scaled-Down CMOS

Muhammad E.S. ELRABAA; Mohab H. ANIS; Mohamed I. ELMASRY

A Contention-Free DOMINO Logic for Scaled-Down CMOS

Muhammad E.S. ELRABAA, Mohab H. ANIS, Mohamed I. ELMASRY

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A new contention-free Domino logic (CF-Domino) that is especially suited for low threshold voltage (LVT) is reported. Its superior noise margin and speed over conventional Domino circuits for LVTs are demonstrated using HSPICE^(R) simulations and a 0.25 µm CMOS technology with a supply voltage of 2.5 V. The impacts of the new technique on dynamic and leakage powers and area were evaluated. At a 3% area increase, and keeping the noise margins constant, the new CF-DOMINO achieves 20% less delay than conventional DOMINO as the threshold voltage scales from 450 mV down to 200 mV. It also achieved 13% less dynamic power and 5% less leakage at that threshold voltage.

Publication: IEICE TRANSACTIONS on Electronics Vol.E85-C No.5 pp.1177-1181

Publication Date: 2002/05/01

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Type of Manuscript: PAPER

Category: Electronic Circuits

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Muhammad E.S. ELRABAA, Mohab H. ANIS, Mohamed I. ELMASRY, "A Contention-Free DOMINO Logic for Scaled-Down CMOS" in IEICE TRANSACTIONS on Electronics, vol. E85-C, no. 5, pp. 1177-1181, May 2002, doi: .
Abstract: A new contention-free Domino logic (CF-Domino) that is especially suited for low threshold voltage (LVT) is reported. Its superior noise margin and speed over conventional Domino circuits for LVTs are demonstrated using HSPICE^(R) simulations and a 0.25 µm CMOS technology with a supply voltage of 2.5 V. The impacts of the new technique on dynamic and leakage powers and area were evaluated. At a 3% area increase, and keeping the noise margins constant, the new CF-DOMINO achieves 20% less delay than conventional DOMINO as the threshold voltage scales from 450 mV down to 200 mV. It also achieved 13% less dynamic power and 5% less leakage at that threshold voltage.
URL: https://global.ieice.org/en_transactions/electronics/10.1587/e85-c_5_1177/_p

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@ARTICLE{e85-c_5_1177,
author={Muhammad E.S. ELRABAA, Mohab H. ANIS, Mohamed I. ELMASRY, },
journal={IEICE TRANSACTIONS on Electronics},
title={A Contention-Free DOMINO Logic for Scaled-Down CMOS},
year={2002},
volume={E85-C},
number={5},
pages={1177-1181},
abstract={A new contention-free Domino logic (CF-Domino) that is especially suited for low threshold voltage (LVT) is reported. Its superior noise margin and speed over conventional Domino circuits for LVTs are demonstrated using HSPICE^(R) simulations and a 0.25 µm CMOS technology with a supply voltage of 2.5 V. The impacts of the new technique on dynamic and leakage powers and area were evaluated. At a 3% area increase, and keeping the noise margins constant, the new CF-DOMINO achieves 20% less delay than conventional DOMINO as the threshold voltage scales from 450 mV down to 200 mV. It also achieved 13% less dynamic power and 5% less leakage at that threshold voltage.},
keywords={},
doi={},
ISSN={},
month={May},}

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TY - JOUR
TI - A Contention-Free DOMINO Logic for Scaled-Down CMOS
T2 - IEICE TRANSACTIONS on Electronics
SP - 1177
EP - 1181
AU - Muhammad E.S. ELRABAA
AU - Mohab H. ANIS
AU - Mohamed I. ELMASRY
PY - 2002
DO -
JO - IEICE TRANSACTIONS on Electronics
SN -
VL - E85-C
IS - 5
JA - IEICE TRANSACTIONS on Electronics
Y1 - May 2002
AB - A new contention-free Domino logic (CF-Domino) that is especially suited for low threshold voltage (LVT) is reported. Its superior noise margin and speed over conventional Domino circuits for LVTs are demonstrated using HSPICE^(R) simulations and a 0.25 µm CMOS technology with a supply voltage of 2.5 V. The impacts of the new technique on dynamic and leakage powers and area were evaluated. At a 3% area increase, and keeping the noise margins constant, the new CF-DOMINO achieves 20% less delay than conventional DOMINO as the threshold voltage scales from 450 mV down to 200 mV. It also achieved 13% less dynamic power and 5% less leakage at that threshold voltage.
ER -