Energy consumption has become one of the most critical constraints in the design of portable multimedia systems. For media applications, address buses between processor and data memory consume a considerable amount of energy due to their large capacitance and frequent accesses. This paper studies impacts of memory data organization on the address bus energy. Our experiments show that the address bus activity is significantly reduced by 50% through exploring memory data organization and encoding address buses.
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Hiroyuki TOMIYAMA, Hiroaki TAKADA, Nikil D. DUTT, "Memory Data Organization for Low-Energy Address Buses" in IEICE TRANSACTIONS on Electronics,
vol. E87-C, no. 4, pp. 606-612, April 2004, doi: .
Abstract: Energy consumption has become one of the most critical constraints in the design of portable multimedia systems. For media applications, address buses between processor and data memory consume a considerable amount of energy due to their large capacitance and frequent accesses. This paper studies impacts of memory data organization on the address bus energy. Our experiments show that the address bus activity is significantly reduced by 50% through exploring memory data organization and encoding address buses.
URL: https://global.ieice.org/en_transactions/electronics/10.1587/e87-c_4_606/_p
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@ARTICLE{e87-c_4_606,
author={Hiroyuki TOMIYAMA, Hiroaki TAKADA, Nikil D. DUTT, },
journal={IEICE TRANSACTIONS on Electronics},
title={Memory Data Organization for Low-Energy Address Buses},
year={2004},
volume={E87-C},
number={4},
pages={606-612},
abstract={Energy consumption has become one of the most critical constraints in the design of portable multimedia systems. For media applications, address buses between processor and data memory consume a considerable amount of energy due to their large capacitance and frequent accesses. This paper studies impacts of memory data organization on the address bus energy. Our experiments show that the address bus activity is significantly reduced by 50% through exploring memory data organization and encoding address buses.},
keywords={},
doi={},
ISSN={},
month={April},}
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TY - JOUR
TI - Memory Data Organization for Low-Energy Address Buses
T2 - IEICE TRANSACTIONS on Electronics
SP - 606
EP - 612
AU - Hiroyuki TOMIYAMA
AU - Hiroaki TAKADA
AU - Nikil D. DUTT
PY - 2004
DO -
JO - IEICE TRANSACTIONS on Electronics
SN -
VL - E87-C
IS - 4
JA - IEICE TRANSACTIONS on Electronics
Y1 - April 2004
AB - Energy consumption has become one of the most critical constraints in the design of portable multimedia systems. For media applications, address buses between processor and data memory consume a considerable amount of energy due to their large capacitance and frequent accesses. This paper studies impacts of memory data organization on the address bus energy. Our experiments show that the address bus activity is significantly reduced by 50% through exploring memory data organization and encoding address buses.
ER -