IEICE TRANSACTIONS on Electronics
Design Study of Domain Decomposition Operation in Dataflow Architecture FDTD/FIT Dedicated Computer
Summary :
To aim to achieve a high-performance computation for microwave simulations with low cost, small size machine and low energy consumption, a method of the FDTD dedicated computer has been investigated. It was shown by VHDL logical circuit simulations that the FDTD dedicated computer with a dataflow architecture has much higher performance than that of high-end PC and GPU. Then the remaining task of this work is large scale computations by the dedicated computer, since microwave simulations for only 18×18×Z grid space (Z is the number of girds for z direction) can be executed in a single FPGA at most. To treat much larger numerical model size for practical applications, this paper considers an implementation of a domain decomposition method operation of the FDTD dedicated computer in a single FPGA.
- Publication
- IEICE TRANSACTIONS on Electronics Vol.E101-C No.1 pp.20-25
- Publication Date
- 2018/01/01
- Publicized
- Online ISSN
- 1745-1353
- DOI
- 10.1587/transele.E101.C.20
- Type of Manuscript
- Special Section PAPER (Special Section on Recent Progress in Electromagnetic Theory and Its Application)
- Category
- Electromagnetic Theory
Authors
Hideki KAWAGUCHI
Muroran Institute of Technology
Keyword
Latest Issue
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Hideki KAWAGUCHI, "Design Study of Domain Decomposition Operation in Dataflow Architecture FDTD/FIT Dedicated Computer" in IEICE TRANSACTIONS on Electronics,
vol. E101-C, no. 1, pp. 20-25, January 2018, doi: 10.1587/transele.E101.C.20.
Abstract: To aim to achieve a high-performance computation for microwave simulations with low cost, small size machine and low energy consumption, a method of the FDTD dedicated computer has been investigated. It was shown by VHDL logical circuit simulations that the FDTD dedicated computer with a dataflow architecture has much higher performance than that of high-end PC and GPU. Then the remaining task of this work is large scale computations by the dedicated computer, since microwave simulations for only 18×18×Z grid space (Z is the number of girds for z direction) can be executed in a single FPGA at most. To treat much larger numerical model size for practical applications, this paper considers an implementation of a domain decomposition method operation of the FDTD dedicated computer in a single FPGA.
URL: https://global.ieice.org/en_transactions/electronics/10.1587/transele.E101.C.20/_p
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@ARTICLE{e101-c_1_20,
author={Hideki KAWAGUCHI, },
journal={IEICE TRANSACTIONS on Electronics},
title={Design Study of Domain Decomposition Operation in Dataflow Architecture FDTD/FIT Dedicated Computer},
year={2018},
volume={E101-C},
number={1},
pages={20-25},
abstract={To aim to achieve a high-performance computation for microwave simulations with low cost, small size machine and low energy consumption, a method of the FDTD dedicated computer has been investigated. It was shown by VHDL logical circuit simulations that the FDTD dedicated computer with a dataflow architecture has much higher performance than that of high-end PC and GPU. Then the remaining task of this work is large scale computations by the dedicated computer, since microwave simulations for only 18×18×Z grid space (Z is the number of girds for z direction) can be executed in a single FPGA at most. To treat much larger numerical model size for practical applications, this paper considers an implementation of a domain decomposition method operation of the FDTD dedicated computer in a single FPGA.},
keywords={},
doi={10.1587/transele.E101.C.20},
ISSN={1745-1353},
month={January},}
Copy
TY - JOUR
TI - Design Study of Domain Decomposition Operation in Dataflow Architecture FDTD/FIT Dedicated Computer
T2 - IEICE TRANSACTIONS on Electronics
SP - 20
EP - 25
AU - Hideki KAWAGUCHI
PY - 2018
DO - 10.1587/transele.E101.C.20
JO - IEICE TRANSACTIONS on Electronics
SN - 1745-1353
VL - E101-C
IS - 1
JA - IEICE TRANSACTIONS on Electronics
Y1 - January 2018
AB - To aim to achieve a high-performance computation for microwave simulations with low cost, small size machine and low energy consumption, a method of the FDTD dedicated computer has been investigated. It was shown by VHDL logical circuit simulations that the FDTD dedicated computer with a dataflow architecture has much higher performance than that of high-end PC and GPU. Then the remaining task of this work is large scale computations by the dedicated computer, since microwave simulations for only 18×18×Z grid space (Z is the number of girds for z direction) can be executed in a single FPGA at most. To treat much larger numerical model size for practical applications, this paper considers an implementation of a domain decomposition method operation of the FDTD dedicated computer in a single FPGA.
ER -
English
