Dynamic Voltage Scaling for Real-Time Systems with System Workload Analysis

Zhe ZHANG; Xin CHEN; De-jun QIAN; Chen HU

doi:10.1587/transele.E93.C.399

Dynamic Voltage Scaling for Real-Time Systems with System Workload Analysis

Zhe ZHANG, Xin CHEN, De-jun QIAN, Chen HU

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Dynamic Voltage Scaling (DVS) is a well-known low-power design technique, which adjusts the clock speed and supply voltage dynamically to reduce the energy consumption of real-time systems. Previous studies considered the probabilistic distribution of tasks' workloads to assist DVS in task scheduling. These studies use probability information for intra-task frequency scheduling but do not sufficiently explore the opportunities for the system workload to save more energy. This paper presents a novel DVS algorithm for periodic real-time tasks based on the analysis of the system workload to reduce its power consumption. This algorithm takes full advantage of the probabilistic distribution characteristics of the system workload under priority-driven scheduling such as Earliest-Deadline-First (EDF). Experimental results show that the proposed algorithm reduces processor idle time and spends more busy time in lower-power speeds. The measurement indicates that compared to the relative DVS algorithms, this algorithm saves energy by at least 30% while delivering statistical performance guarantees.

Publication: IEICE TRANSACTIONS on Electronics Vol.E93-C No.3 pp.399-406

Publication Date: 2010/03/01

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Online ISSN: 1745-1353

DOI: 10.1587/transele.E93.C.399

Type of Manuscript: PAPER

Category: Electronic Circuits

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Zhe ZHANG, Xin CHEN, De-jun QIAN, Chen HU, "Dynamic Voltage Scaling for Real-Time Systems with System Workload Analysis" in IEICE TRANSACTIONS on Electronics, vol. E93-C, no. 3, pp. 399-406, March 2010, doi: 10.1587/transele.E93.C.399.
Abstract: Dynamic Voltage Scaling (DVS) is a well-known low-power design technique, which adjusts the clock speed and supply voltage dynamically to reduce the energy consumption of real-time systems. Previous studies considered the probabilistic distribution of tasks' workloads to assist DVS in task scheduling. These studies use probability information for intra-task frequency scheduling but do not sufficiently explore the opportunities for the system workload to save more energy. This paper presents a novel DVS algorithm for periodic real-time tasks based on the analysis of the system workload to reduce its power consumption. This algorithm takes full advantage of the probabilistic distribution characteristics of the system workload under priority-driven scheduling such as Earliest-Deadline-First (EDF). Experimental results show that the proposed algorithm reduces processor idle time and spends more busy time in lower-power speeds. The measurement indicates that compared to the relative DVS algorithms, this algorithm saves energy by at least 30% while delivering statistical performance guarantees.
URL: https://global.ieice.org/en_transactions/electronics/10.1587/transele.E93.C.399/_p

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@ARTICLE{e93-c_3_399,
author={Zhe ZHANG, Xin CHEN, De-jun QIAN, Chen HU, },
journal={IEICE TRANSACTIONS on Electronics},
title={Dynamic Voltage Scaling for Real-Time Systems with System Workload Analysis},
year={2010},
volume={E93-C},
number={3},
pages={399-406},
abstract={Dynamic Voltage Scaling (DVS) is a well-known low-power design technique, which adjusts the clock speed and supply voltage dynamically to reduce the energy consumption of real-time systems. Previous studies considered the probabilistic distribution of tasks' workloads to assist DVS in task scheduling. These studies use probability information for intra-task frequency scheduling but do not sufficiently explore the opportunities for the system workload to save more energy. This paper presents a novel DVS algorithm for periodic real-time tasks based on the analysis of the system workload to reduce its power consumption. This algorithm takes full advantage of the probabilistic distribution characteristics of the system workload under priority-driven scheduling such as Earliest-Deadline-First (EDF). Experimental results show that the proposed algorithm reduces processor idle time and spends more busy time in lower-power speeds. The measurement indicates that compared to the relative DVS algorithms, this algorithm saves energy by at least 30% while delivering statistical performance guarantees.},
keywords={},
doi={10.1587/transele.E93.C.399},
ISSN={1745-1353},
month={March},}

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TY - JOUR
TI - Dynamic Voltage Scaling for Real-Time Systems with System Workload Analysis
T2 - IEICE TRANSACTIONS on Electronics
SP - 399
EP - 406
AU - Zhe ZHANG
AU - Xin CHEN
AU - De-jun QIAN
AU - Chen HU
PY - 2010
DO - 10.1587/transele.E93.C.399
JO - IEICE TRANSACTIONS on Electronics
SN - 1745-1353
VL - E93-C
IS - 3
JA - IEICE TRANSACTIONS on Electronics
Y1 - March 2010
AB - Dynamic Voltage Scaling (DVS) is a well-known low-power design technique, which adjusts the clock speed and supply voltage dynamically to reduce the energy consumption of real-time systems. Previous studies considered the probabilistic distribution of tasks' workloads to assist DVS in task scheduling. These studies use probability information for intra-task frequency scheduling but do not sufficiently explore the opportunities for the system workload to save more energy. This paper presents a novel DVS algorithm for periodic real-time tasks based on the analysis of the system workload to reduce its power consumption. This algorithm takes full advantage of the probabilistic distribution characteristics of the system workload under priority-driven scheduling such as Earliest-Deadline-First (EDF). Experimental results show that the proposed algorithm reduces processor idle time and spends more busy time in lower-power speeds. The measurement indicates that compared to the relative DVS algorithms, this algorithm saves energy by at least 30% while delivering statistical performance guarantees.
ER -