CMOS Driver for Heavy-Load Flat-Panel Scan-Line Circuit Based on Complementary Dual-Bootstrap
Summary :
This paper, presents a high-speed full swing driver for a heavy-load flat-panel scan-line circuit. The high driving capability is achieved using the proposed Complementary Dual-Bootstrap (CDUB) technique. The scan-line CDUB driver was fabricated in a 0.35-µm CMOS technology. The measured results, under the flat-panel scan-line load model, indicate that the delay time is within 2.8µs and the average power is 0.74mW for a 5V supply voltage.
- Publication
- IEICE TRANSACTIONS on Electronics Vol.E96-C No.11 pp.1399-1403
- Publication Date
- 2013/11/01
- Publicized
- Online ISSN
- 1745-1353
- DOI
- 10.1587/transele.E96.C.1399
- Type of Manuscript
- Special Section PAPER (Special Section on Electronic Displays)
- Category
Authors
Shu-Chung YI
NCUE
Zhi-Ming LIN
NCUE
Po-Yo KUO
National Yunlin University of Science & Technology
Hsin-Chi LAI
NCUE
Keyword
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Shu-Chung YI, Zhi-Ming LIN, Po-Yo KUO, Hsin-Chi LAI, "CMOS Driver for Heavy-Load Flat-Panel Scan-Line Circuit Based on Complementary Dual-Bootstrap" in IEICE TRANSACTIONS on Electronics,
vol. E96-C, no. 11, pp. 1399-1403, November 2013, doi: 10.1587/transele.E96.C.1399.
Abstract: This paper, presents a high-speed full swing driver for a heavy-load flat-panel scan-line circuit. The high driving capability is achieved using the proposed Complementary Dual-Bootstrap (CDUB) technique. The scan-line CDUB driver was fabricated in a 0.35-µm CMOS technology. The measured results, under the flat-panel scan-line load model, indicate that the delay time is within 2.8µs and the average power is 0.74mW for a 5V supply voltage.
URL: https://global.ieice.org/en_transactions/electronics/10.1587/transele.E96.C.1399/_p
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@ARTICLE{e96-c_11_1399,
author={Shu-Chung YI, Zhi-Ming LIN, Po-Yo KUO, Hsin-Chi LAI, },
journal={IEICE TRANSACTIONS on Electronics},
title={CMOS Driver for Heavy-Load Flat-Panel Scan-Line Circuit Based on Complementary Dual-Bootstrap},
year={2013},
volume={E96-C},
number={11},
pages={1399-1403},
abstract={This paper, presents a high-speed full swing driver for a heavy-load flat-panel scan-line circuit. The high driving capability is achieved using the proposed Complementary Dual-Bootstrap (CDUB) technique. The scan-line CDUB driver was fabricated in a 0.35-µm CMOS technology. The measured results, under the flat-panel scan-line load model, indicate that the delay time is within 2.8µs and the average power is 0.74mW for a 5V supply voltage.},
keywords={},
doi={10.1587/transele.E96.C.1399},
ISSN={1745-1353},
month={November},}
Copy
TY - JOUR
TI - CMOS Driver for Heavy-Load Flat-Panel Scan-Line Circuit Based on Complementary Dual-Bootstrap
T2 - IEICE TRANSACTIONS on Electronics
SP - 1399
EP - 1403
AU - Shu-Chung YI
AU - Zhi-Ming LIN
AU - Po-Yo KUO
AU - Hsin-Chi LAI
PY - 2013
DO - 10.1587/transele.E96.C.1399
JO - IEICE TRANSACTIONS on Electronics
SN - 1745-1353
VL - E96-C
IS - 11
JA - IEICE TRANSACTIONS on Electronics
Y1 - November 2013
AB - This paper, presents a high-speed full swing driver for a heavy-load flat-panel scan-line circuit. The high driving capability is achieved using the proposed Complementary Dual-Bootstrap (CDUB) technique. The scan-line CDUB driver was fabricated in a 0.35-µm CMOS technology. The measured results, under the flat-panel scan-line load model, indicate that the delay time is within 2.8µs and the average power is 0.74mW for a 5V supply voltage.
ER -
English
