Data exchange, in which two blocks of data are swapped between cores in distributed memory systems, necessitates additional memory buffer in a multiprocessor system-on-chip. In this paper, we propose a novel bidirectional inter-core communication mechanism called coherent direct memory access (CoDMA). The CoDMA ensures that the writing address is always less than the reading address in coherent read and write mode, so as to avoid read-after-write (RAW) errors. It features an efficient data exchanging scheme without using data buffer in the memory. A four-core single-instruction multiple-data processor is established for the experiments, based on a multi-bus network-on-chip. Experimental results show that the proposed method consumes no additional memory buffer and achieves 39% and 20% average performance improvement compared with traditional Methods 1 and 2, respectively. And a maximal of 43% reduction in memory usage is achieved, at the cost of only 0.22% more area overhead compared with the entire system.
Ting CHEN
National University of Defense Technology
Hengzhu LIU
National University of Defense Technology
Botao ZHANG
National University of Defense Technology
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Ting CHEN, Hengzhu LIU, Botao ZHANG, "CoDMA: Buffer Avoided Data Exchange in Distributed Memory Systems" in IEICE TRANSACTIONS on Electronics,
vol. E97-C, no. 4, pp. 386-391, April 2014, doi: 10.1587/transele.E97.C.386.
Abstract: Data exchange, in which two blocks of data are swapped between cores in distributed memory systems, necessitates additional memory buffer in a multiprocessor system-on-chip. In this paper, we propose a novel bidirectional inter-core communication mechanism called coherent direct memory access (CoDMA). The CoDMA ensures that the writing address is always less than the reading address in coherent read and write mode, so as to avoid read-after-write (RAW) errors. It features an efficient data exchanging scheme without using data buffer in the memory. A four-core single-instruction multiple-data processor is established for the experiments, based on a multi-bus network-on-chip. Experimental results show that the proposed method consumes no additional memory buffer and achieves 39% and 20% average performance improvement compared with traditional Methods 1 and 2, respectively. And a maximal of 43% reduction in memory usage is achieved, at the cost of only 0.22% more area overhead compared with the entire system.
URL: https://global.ieice.org/en_transactions/electronics/10.1587/transele.E97.C.386/_p
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@ARTICLE{e97-c_4_386,
author={Ting CHEN, Hengzhu LIU, Botao ZHANG, },
journal={IEICE TRANSACTIONS on Electronics},
title={CoDMA: Buffer Avoided Data Exchange in Distributed Memory Systems},
year={2014},
volume={E97-C},
number={4},
pages={386-391},
abstract={Data exchange, in which two blocks of data are swapped between cores in distributed memory systems, necessitates additional memory buffer in a multiprocessor system-on-chip. In this paper, we propose a novel bidirectional inter-core communication mechanism called coherent direct memory access (CoDMA). The CoDMA ensures that the writing address is always less than the reading address in coherent read and write mode, so as to avoid read-after-write (RAW) errors. It features an efficient data exchanging scheme without using data buffer in the memory. A four-core single-instruction multiple-data processor is established for the experiments, based on a multi-bus network-on-chip. Experimental results show that the proposed method consumes no additional memory buffer and achieves 39% and 20% average performance improvement compared with traditional Methods 1 and 2, respectively. And a maximal of 43% reduction in memory usage is achieved, at the cost of only 0.22% more area overhead compared with the entire system.},
keywords={},
doi={10.1587/transele.E97.C.386},
ISSN={1745-1353},
month={April},}
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TY - JOUR
TI - CoDMA: Buffer Avoided Data Exchange in Distributed Memory Systems
T2 - IEICE TRANSACTIONS on Electronics
SP - 386
EP - 391
AU - Ting CHEN
AU - Hengzhu LIU
AU - Botao ZHANG
PY - 2014
DO - 10.1587/transele.E97.C.386
JO - IEICE TRANSACTIONS on Electronics
SN - 1745-1353
VL - E97-C
IS - 4
JA - IEICE TRANSACTIONS on Electronics
Y1 - April 2014
AB - Data exchange, in which two blocks of data are swapped between cores in distributed memory systems, necessitates additional memory buffer in a multiprocessor system-on-chip. In this paper, we propose a novel bidirectional inter-core communication mechanism called coherent direct memory access (CoDMA). The CoDMA ensures that the writing address is always less than the reading address in coherent read and write mode, so as to avoid read-after-write (RAW) errors. It features an efficient data exchanging scheme without using data buffer in the memory. A four-core single-instruction multiple-data processor is established for the experiments, based on a multi-bus network-on-chip. Experimental results show that the proposed method consumes no additional memory buffer and achieves 39% and 20% average performance improvement compared with traditional Methods 1 and 2, respectively. And a maximal of 43% reduction in memory usage is achieved, at the cost of only 0.22% more area overhead compared with the entire system.
ER -