An Optimized Auto-tuning Digital DC--DC Converter Based on Linear-Non-Linear and Predictive PID
Summary :
A novel auto-tuning digital DC--DC converter is presented. In order to reduce the recovery time and undershoot, the auto-tuning control combines LnL, conventional PID and a predictive PID with a configurable predictive coefficient. A switch module is used to select an algorithm from the three control algorithms, according to the difference between the error signal and the two initially predefined thresholds. The detection and control logic is designed for both window delay line ADC and Σ Δ DPWM to correct the delay deviation. When the output of the converter exceeds the quantization range, the digital output of ADC is set at 0 or 1, and the delay line stops working to reduce power consumption. Theoretical analysis and simulations in the CSMC CMOS 0.5 μm process are carried out to verify the proposed DC--DC converter. It is found that the converter achieves a power efficiency of more than 90% at heavy load, and reduces the recovery time and undershoot.
- Publication
- IEICE TRANSACTIONS on Electronics Vol.E97-C No.8 pp.813-819
- Publication Date
- 2014/08/01
- Publicized
- Online ISSN
- 1745-1353
- DOI
- 10.1587/transele.E97.C.813
- Type of Manuscript
- PAPER
- Category
- Electronic Circuits
Authors
Chuang WANG
Xi'an Jiaotong University
Zunchao LI
Xi'an Jiaotong University
Cheng LUO
Realsil Microelectronics Inc
Lijuan ZHAO
Xi'an Jiaotong University
Yefei ZHANG
Xi'an Jiaotong University
Feng LIANG
Xi'an Jiaotong University
Keyword
Latest Issue
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Chuang WANG, Zunchao LI, Cheng LUO, Lijuan ZHAO, Yefei ZHANG, Feng LIANG, "An Optimized Auto-tuning Digital DC--DC Converter Based on Linear-Non-Linear and Predictive PID" in IEICE TRANSACTIONS on Electronics,
vol. E97-C, no. 8, pp. 813-819, August 2014, doi: 10.1587/transele.E97.C.813.
Abstract: A novel auto-tuning digital DC--DC converter is presented. In order to reduce the recovery time and undershoot, the auto-tuning control combines LnL, conventional PID and a predictive PID with a configurable predictive coefficient. A switch module is used to select an algorithm from the three control algorithms, according to the difference between the error signal and the two initially predefined thresholds. The detection and control logic is designed for both window delay line ADC and Σ Δ DPWM to correct the delay deviation. When the output of the converter exceeds the quantization range, the digital output of ADC is set at 0 or 1, and the delay line stops working to reduce power consumption. Theoretical analysis and simulations in the CSMC CMOS 0.5 μm process are carried out to verify the proposed DC--DC converter. It is found that the converter achieves a power efficiency of more than 90% at heavy load, and reduces the recovery time and undershoot.
URL: https://global.ieice.org/en_transactions/electronics/10.1587/transele.E97.C.813/_p
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@ARTICLE{e97-c_8_813,
author={Chuang WANG, Zunchao LI, Cheng LUO, Lijuan ZHAO, Yefei ZHANG, Feng LIANG, },
journal={IEICE TRANSACTIONS on Electronics},
title={An Optimized Auto-tuning Digital DC--DC Converter Based on Linear-Non-Linear and Predictive PID},
year={2014},
volume={E97-C},
number={8},
pages={813-819},
abstract={A novel auto-tuning digital DC--DC converter is presented. In order to reduce the recovery time and undershoot, the auto-tuning control combines LnL, conventional PID and a predictive PID with a configurable predictive coefficient. A switch module is used to select an algorithm from the three control algorithms, according to the difference between the error signal and the two initially predefined thresholds. The detection and control logic is designed for both window delay line ADC and Σ Δ DPWM to correct the delay deviation. When the output of the converter exceeds the quantization range, the digital output of ADC is set at 0 or 1, and the delay line stops working to reduce power consumption. Theoretical analysis and simulations in the CSMC CMOS 0.5 μm process are carried out to verify the proposed DC--DC converter. It is found that the converter achieves a power efficiency of more than 90% at heavy load, and reduces the recovery time and undershoot.},
keywords={},
doi={10.1587/transele.E97.C.813},
ISSN={1745-1353},
month={August},}
Copy
TY - JOUR
TI - An Optimized Auto-tuning Digital DC--DC Converter Based on Linear-Non-Linear and Predictive PID
T2 - IEICE TRANSACTIONS on Electronics
SP - 813
EP - 819
AU - Chuang WANG
AU - Zunchao LI
AU - Cheng LUO
AU - Lijuan ZHAO
AU - Yefei ZHANG
AU - Feng LIANG
PY - 2014
DO - 10.1587/transele.E97.C.813
JO - IEICE TRANSACTIONS on Electronics
SN - 1745-1353
VL - E97-C
IS - 8
JA - IEICE TRANSACTIONS on Electronics
Y1 - August 2014
AB - A novel auto-tuning digital DC--DC converter is presented. In order to reduce the recovery time and undershoot, the auto-tuning control combines LnL, conventional PID and a predictive PID with a configurable predictive coefficient. A switch module is used to select an algorithm from the three control algorithms, according to the difference between the error signal and the two initially predefined thresholds. The detection and control logic is designed for both window delay line ADC and Σ Δ DPWM to correct the delay deviation. When the output of the converter exceeds the quantization range, the digital output of ADC is set at 0 or 1, and the delay line stops working to reduce power consumption. Theoretical analysis and simulations in the CSMC CMOS 0.5 μm process are carried out to verify the proposed DC--DC converter. It is found that the converter achieves a power efficiency of more than 90% at heavy load, and reduces the recovery time and undershoot.
ER -
English
