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IEICE TRANSACTIONS on Fundamentals

On-Chip Thermal Gradient Analysis Considering Interdependence between Leakage Power and Temperature

Takashi SATO, Junji ICHIMIYA, Nobuto ONO, Masanori HASHIMOTO

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Summary :

In this paper, we propose a methodology for calculating on-chip temperature gradient and leakage power distributions. It considers the interdependence between leakage power and local temperature using a general circuit simulator as a differential equation solver. The proposed methodology can be utilized in the early stages of the design cycle as well as in the final verification phase. Simulation results proved that consideration of the temperature dependence of the leakage power is critically important for achieving reliable physical designs since the conventional temperature analysis that ignores the interdependence underestimates leakage power considerably and may overlook potential thermal runaway.

Publication
IEICE TRANSACTIONS on Fundamentals Vol.E89-A No.12 pp.3491-3499
Publication Date
2006/12/01
Publicized
Online ISSN
1745-1337
DOI
10.1093/ietfec/e89-a.12.3491
Type of Manuscript
Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category
Simulation and Verification

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