Low Complexity Bit-Parallel Squarer for GF(2n) Defined by Irreducible Trinomials

Sun-Mi PARK; Ku-Young CHANG

doi:10.1093/ietfec/e89-a.9.2451

Low Complexity Bit-Parallel Squarer for GF(2ⁿ) Defined by Irreducible Trinomials

Sun-Mi PARK, Ku-Young CHANG

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We present a bit-parallel squarer for GF(2ⁿ) defined by an irreducible trinomial xⁿ +x^k +1 using a shifted polynomial basis. The proposed squarer requires T_X delay and at most n/2 XOR gates, where T_X is the delay of one XOR gate. As a result, the squarer using the shifted polynomial basis is more efficient than one using the polynomial basis except for k=1 or n/2.

Publication: IEICE TRANSACTIONS on Fundamentals Vol.E89-A No.9 pp.2451-2452

Publication Date: 2006/09/01

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Online ISSN: 1745-1337

DOI: 10.1093/ietfec/e89-a.9.2451

Type of Manuscript: LETTER

Category: Algorithms and Data Structures

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Sun-Mi PARK, Ku-Young CHANG, "Low Complexity Bit-Parallel Squarer for GF(2n) Defined by Irreducible Trinomials" in IEICE TRANSACTIONS on Fundamentals, vol. E89-A, no. 9, pp. 2451-2452, September 2006, doi: 10.1093/ietfec/e89-a.9.2451.
Abstract: We present a bit-parallel squarer for GF(2ⁿ) defined by an irreducible trinomial xⁿ +x^k +1 using a shifted polynomial basis. The proposed squarer requires T_X delay and at most n/2 XOR gates, where T_X is the delay of one XOR gate. As a result, the squarer using the shifted polynomial basis is more efficient than one using the polynomial basis except for k=1 or n/2.
URL: https://global.ieice.org/en_transactions/fundamentals/10.1093/ietfec/e89-a.9.2451/_p

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@ARTICLE{e89-a_9_2451,
author={Sun-Mi PARK, Ku-Young CHANG, },
journal={IEICE TRANSACTIONS on Fundamentals},
title={Low Complexity Bit-Parallel Squarer for GF(2n) Defined by Irreducible Trinomials},
year={2006},
volume={E89-A},
number={9},
pages={2451-2452},
abstract={We present a bit-parallel squarer for GF(2ⁿ) defined by an irreducible trinomial xⁿ +x^k +1 using a shifted polynomial basis. The proposed squarer requires T_X delay and at most n/2 XOR gates, where T_X is the delay of one XOR gate. As a result, the squarer using the shifted polynomial basis is more efficient than one using the polynomial basis except for k=1 or n/2.},
keywords={},
doi={10.1093/ietfec/e89-a.9.2451},
ISSN={1745-1337},
month={September},}

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TY - JOUR
TI - Low Complexity Bit-Parallel Squarer for GF(2n) Defined by Irreducible Trinomials
T2 - IEICE TRANSACTIONS on Fundamentals
SP - 2451
EP - 2452
AU - Sun-Mi PARK
AU - Ku-Young CHANG
PY - 2006
DO - 10.1093/ietfec/e89-a.9.2451
JO - IEICE TRANSACTIONS on Fundamentals
SN - 1745-1337
VL - E89-A
IS - 9
JA - IEICE TRANSACTIONS on Fundamentals
Y1 - September 2006
AB - We present a bit-parallel squarer for GF(2ⁿ) defined by an irreducible trinomial xⁿ +x^k +1 using a shifted polynomial basis. The proposed squarer requires T_X delay and at most n/2 XOR gates, where T_X is the delay of one XOR gate. As a result, the squarer using the shifted polynomial basis is more efficient than one using the polynomial basis except for k=1 or n/2.
ER -