IEICE TRANSACTIONS on Fundamentals
Formal Model for the Reduction of the Dynamic Energy Consumption in Multi-Layer Memory Subsystems
Summary :
In real-time data-dominated communication and multimedia processing applications, a multi-layer memory hierarchy is typically used to enhance the system performance and also to reduce the energy consumption. Savings of dynamic energy can be obtained by accessing frequently used data from smaller on-chip memories rather than from large background memories. This paper focuses on the reduction of the dynamic energy consumption in the memory subsystem of multidimensional signal processing systems, starting from the high-level algorithmic specification of the application. The paper presents a formal model which identifies those parts of arrays more intensely accessed, taking also into account the relative lifetimes of the signals. Tested on a two-layer memory hierarchy, this model led to savings of dynamic energy from 40% to over 70% relative to the energy used in the case of flat memory designs.
- Publication
- IEICE TRANSACTIONS on Fundamentals Vol.E91-A No.12 pp.3559-3567
- Publication Date
- 2008/12/01
- Publicized
- Online ISSN
- 1745-1337
- DOI
- 10.1093/ietfec/e91-a.12.3559
- Type of Manuscript
- Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
- Category
- High-Level Synthesis and System-Level Design
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Hongwei ZHU, Ilie I. LUICAN, Florin BALASA, Dhiraj K. PRADHAN, "Formal Model for the Reduction of the Dynamic Energy Consumption in Multi-Layer Memory Subsystems" in IEICE TRANSACTIONS on Fundamentals,
vol. E91-A, no. 12, pp. 3559-3567, December 2008, doi: 10.1093/ietfec/e91-a.12.3559.
Abstract: In real-time data-dominated communication and multimedia processing applications, a multi-layer memory hierarchy is typically used to enhance the system performance and also to reduce the energy consumption. Savings of dynamic energy can be obtained by accessing frequently used data from smaller on-chip memories rather than from large background memories. This paper focuses on the reduction of the dynamic energy consumption in the memory subsystem of multidimensional signal processing systems, starting from the high-level algorithmic specification of the application. The paper presents a formal model which identifies those parts of arrays more intensely accessed, taking also into account the relative lifetimes of the signals. Tested on a two-layer memory hierarchy, this model led to savings of dynamic energy from 40% to over 70% relative to the energy used in the case of flat memory designs.
URL: https://global.ieice.org/en_transactions/fundamentals/10.1093/ietfec/e91-a.12.3559/_p
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@ARTICLE{e91-a_12_3559,
author={Hongwei ZHU, Ilie I. LUICAN, Florin BALASA, Dhiraj K. PRADHAN, },
journal={IEICE TRANSACTIONS on Fundamentals},
title={Formal Model for the Reduction of the Dynamic Energy Consumption in Multi-Layer Memory Subsystems},
year={2008},
volume={E91-A},
number={12},
pages={3559-3567},
abstract={In real-time data-dominated communication and multimedia processing applications, a multi-layer memory hierarchy is typically used to enhance the system performance and also to reduce the energy consumption. Savings of dynamic energy can be obtained by accessing frequently used data from smaller on-chip memories rather than from large background memories. This paper focuses on the reduction of the dynamic energy consumption in the memory subsystem of multidimensional signal processing systems, starting from the high-level algorithmic specification of the application. The paper presents a formal model which identifies those parts of arrays more intensely accessed, taking also into account the relative lifetimes of the signals. Tested on a two-layer memory hierarchy, this model led to savings of dynamic energy from 40% to over 70% relative to the energy used in the case of flat memory designs.},
keywords={},
doi={10.1093/ietfec/e91-a.12.3559},
ISSN={1745-1337},
month={December},}
Copy
TY - JOUR
TI - Formal Model for the Reduction of the Dynamic Energy Consumption in Multi-Layer Memory Subsystems
T2 - IEICE TRANSACTIONS on Fundamentals
SP - 3559
EP - 3567
AU - Hongwei ZHU
AU - Ilie I. LUICAN
AU - Florin BALASA
AU - Dhiraj K. PRADHAN
PY - 2008
DO - 10.1093/ietfec/e91-a.12.3559
JO - IEICE TRANSACTIONS on Fundamentals
SN - 1745-1337
VL - E91-A
IS - 12
JA - IEICE TRANSACTIONS on Fundamentals
Y1 - December 2008
AB - In real-time data-dominated communication and multimedia processing applications, a multi-layer memory hierarchy is typically used to enhance the system performance and also to reduce the energy consumption. Savings of dynamic energy can be obtained by accessing frequently used data from smaller on-chip memories rather than from large background memories. This paper focuses on the reduction of the dynamic energy consumption in the memory subsystem of multidimensional signal processing systems, starting from the high-level algorithmic specification of the application. The paper presents a formal model which identifies those parts of arrays more intensely accessed, taking also into account the relative lifetimes of the signals. Tested on a two-layer memory hierarchy, this model led to savings of dynamic energy from 40% to over 70% relative to the energy used in the case of flat memory designs.
ER -
English
