Finite impulse response (FIR) filtering is the most computationally intensive operation in the channelizer of a wireless communication receiver. Higher order FIR channel filters are needed in the channelizer to meet the stringent adjacent channel attenuation specifications of wireless communications standards. The computational cost of FIR filters is dominated by the complexity of the coefficient multipliers. Even though many methods for reducing the complexity of filter multipliers have been proposed in literature, these works focused on lower order filters. This paper presents a coefficient-partitioning-based binary subexpression elimination method for realizing low power FIR filters. We show that the FIR filters implemented using proposed method consume less power and achieve speed improvement compared to existing filter implementations. Design examples of the channel filters employed in the Digital Advanced Mobile Phone System (D-AMPS) and Personal Digital Cellular (PDC) receivers show that the proposed method achieved 23% average reductions of full adder and power consumption and 23.3% reduction of delay over the best existing method. Synthesis results show that the proposed method offers average area reduction of 8% and power reduction of 22% over the best known method in literature.
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Jimson MATHEW, R. MAHESH, A.P. VINOD, Edmund M-K. LAI, "Realization of Low Power High-Speed Channel Filters with Stringent Adjacent Channel Attenuation Specifications for Wireless Communication Receivers" in IEICE TRANSACTIONS on Fundamentals,
vol. E91-A, no. 9, pp. 2564-2570, September 2008, doi: 10.1093/ietfec/e91-a.9.2564.
Abstract: Finite impulse response (FIR) filtering is the most computationally intensive operation in the channelizer of a wireless communication receiver. Higher order FIR channel filters are needed in the channelizer to meet the stringent adjacent channel attenuation specifications of wireless communications standards. The computational cost of FIR filters is dominated by the complexity of the coefficient multipliers. Even though many methods for reducing the complexity of filter multipliers have been proposed in literature, these works focused on lower order filters. This paper presents a coefficient-partitioning-based binary subexpression elimination method for realizing low power FIR filters. We show that the FIR filters implemented using proposed method consume less power and achieve speed improvement compared to existing filter implementations. Design examples of the channel filters employed in the Digital Advanced Mobile Phone System (D-AMPS) and Personal Digital Cellular (PDC) receivers show that the proposed method achieved 23% average reductions of full adder and power consumption and 23.3% reduction of delay over the best existing method. Synthesis results show that the proposed method offers average area reduction of 8% and power reduction of 22% over the best known method in literature.
URL: https://global.ieice.org/en_transactions/fundamentals/10.1093/ietfec/e91-a.9.2564/_p
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@ARTICLE{e91-a_9_2564,
author={Jimson MATHEW, R. MAHESH, A.P. VINOD, Edmund M-K. LAI, },
journal={IEICE TRANSACTIONS on Fundamentals},
title={Realization of Low Power High-Speed Channel Filters with Stringent Adjacent Channel Attenuation Specifications for Wireless Communication Receivers},
year={2008},
volume={E91-A},
number={9},
pages={2564-2570},
abstract={Finite impulse response (FIR) filtering is the most computationally intensive operation in the channelizer of a wireless communication receiver. Higher order FIR channel filters are needed in the channelizer to meet the stringent adjacent channel attenuation specifications of wireless communications standards. The computational cost of FIR filters is dominated by the complexity of the coefficient multipliers. Even though many methods for reducing the complexity of filter multipliers have been proposed in literature, these works focused on lower order filters. This paper presents a coefficient-partitioning-based binary subexpression elimination method for realizing low power FIR filters. We show that the FIR filters implemented using proposed method consume less power and achieve speed improvement compared to existing filter implementations. Design examples of the channel filters employed in the Digital Advanced Mobile Phone System (D-AMPS) and Personal Digital Cellular (PDC) receivers show that the proposed method achieved 23% average reductions of full adder and power consumption and 23.3% reduction of delay over the best existing method. Synthesis results show that the proposed method offers average area reduction of 8% and power reduction of 22% over the best known method in literature.},
keywords={},
doi={10.1093/ietfec/e91-a.9.2564},
ISSN={1745-1337},
month={September},}
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TY - JOUR
TI - Realization of Low Power High-Speed Channel Filters with Stringent Adjacent Channel Attenuation Specifications for Wireless Communication Receivers
T2 - IEICE TRANSACTIONS on Fundamentals
SP - 2564
EP - 2570
AU - Jimson MATHEW
AU - R. MAHESH
AU - A.P. VINOD
AU - Edmund M-K. LAI
PY - 2008
DO - 10.1093/ietfec/e91-a.9.2564
JO - IEICE TRANSACTIONS on Fundamentals
SN - 1745-1337
VL - E91-A
IS - 9
JA - IEICE TRANSACTIONS on Fundamentals
Y1 - September 2008
AB - Finite impulse response (FIR) filtering is the most computationally intensive operation in the channelizer of a wireless communication receiver. Higher order FIR channel filters are needed in the channelizer to meet the stringent adjacent channel attenuation specifications of wireless communications standards. The computational cost of FIR filters is dominated by the complexity of the coefficient multipliers. Even though many methods for reducing the complexity of filter multipliers have been proposed in literature, these works focused on lower order filters. This paper presents a coefficient-partitioning-based binary subexpression elimination method for realizing low power FIR filters. We show that the FIR filters implemented using proposed method consume less power and achieve speed improvement compared to existing filter implementations. Design examples of the channel filters employed in the Digital Advanced Mobile Phone System (D-AMPS) and Personal Digital Cellular (PDC) receivers show that the proposed method achieved 23% average reductions of full adder and power consumption and 23.3% reduction of delay over the best existing method. Synthesis results show that the proposed method offers average area reduction of 8% and power reduction of 22% over the best known method in literature.
ER -