An Efficient State Space Search for the Synthesis of Asynchronous Circuits by Subspace Construction
Summary :
In this paper, an approach to derive a logic function of asynchronous circuits from a graph-based model called Signal Transition Graphs (STG) is discussed. STG's are Petri nets, whose transitions are interpreted as a signal transition on the circuit inputs or gate outputs, and its marking represents a binary state of the circuit. STG's can represent a behavior of circuit, to derive logic functions, however, the reachability graph should be constructed. In the verification of STG's some method based on Occurrence nets (OCN) and its prefix, called unfolding, has been proposed. OCN's can represent both causality and concurrency between two nodes by net structure. In this paper, we propose a method to derive a logic function by generating substate space of a given STG using the structural properties of OCN. The proposed method can be seem as a parallel algorithm for deriving a logic function.
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- IEICE TRANSACTIONS on Fundamentals Vol.E78-A No.11 pp.1504-1510
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- 1995/11/25
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- Special Section PAPER (Special Section on Net Theory and Its Applications to Discrete Event System Design)
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Toshiyuki MIYAMOTO, Dong-Ik LEE, Sadatoshi KUMAGAI, "An Efficient State Space Search for the Synthesis of Asynchronous Circuits by Subspace Construction" in IEICE TRANSACTIONS on Fundamentals,
vol. E78-A, no. 11, pp. 1504-1510, November 1995, doi: .
Abstract: In this paper, an approach to derive a logic function of asynchronous circuits from a graph-based model called Signal Transition Graphs (STG) is discussed. STG's are Petri nets, whose transitions are interpreted as a signal transition on the circuit inputs or gate outputs, and its marking represents a binary state of the circuit. STG's can represent a behavior of circuit, to derive logic functions, however, the reachability graph should be constructed. In the verification of STG's some method based on Occurrence nets (OCN) and its prefix, called unfolding, has been proposed. OCN's can represent both causality and concurrency between two nodes by net structure. In this paper, we propose a method to derive a logic function by generating substate space of a given STG using the structural properties of OCN. The proposed method can be seem as a parallel algorithm for deriving a logic function.
URL: https://global.ieice.org/en_transactions/fundamentals/10.1587/e78-a_11_1504/_p
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@ARTICLE{e78-a_11_1504,
author={Toshiyuki MIYAMOTO, Dong-Ik LEE, Sadatoshi KUMAGAI, },
journal={IEICE TRANSACTIONS on Fundamentals},
title={An Efficient State Space Search for the Synthesis of Asynchronous Circuits by Subspace Construction},
year={1995},
volume={E78-A},
number={11},
pages={1504-1510},
abstract={In this paper, an approach to derive a logic function of asynchronous circuits from a graph-based model called Signal Transition Graphs (STG) is discussed. STG's are Petri nets, whose transitions are interpreted as a signal transition on the circuit inputs or gate outputs, and its marking represents a binary state of the circuit. STG's can represent a behavior of circuit, to derive logic functions, however, the reachability graph should be constructed. In the verification of STG's some method based on Occurrence nets (OCN) and its prefix, called unfolding, has been proposed. OCN's can represent both causality and concurrency between two nodes by net structure. In this paper, we propose a method to derive a logic function by generating substate space of a given STG using the structural properties of OCN. The proposed method can be seem as a parallel algorithm for deriving a logic function.},
keywords={},
doi={},
ISSN={},
month={November},}
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TY - JOUR
TI - An Efficient State Space Search for the Synthesis of Asynchronous Circuits by Subspace Construction
T2 - IEICE TRANSACTIONS on Fundamentals
SP - 1504
EP - 1510
AU - Toshiyuki MIYAMOTO
AU - Dong-Ik LEE
AU - Sadatoshi KUMAGAI
PY - 1995
DO -
JO - IEICE TRANSACTIONS on Fundamentals
SN -
VL - E78-A
IS - 11
JA - IEICE TRANSACTIONS on Fundamentals
Y1 - November 1995
AB - In this paper, an approach to derive a logic function of asynchronous circuits from a graph-based model called Signal Transition Graphs (STG) is discussed. STG's are Petri nets, whose transitions are interpreted as a signal transition on the circuit inputs or gate outputs, and its marking represents a binary state of the circuit. STG's can represent a behavior of circuit, to derive logic functions, however, the reachability graph should be constructed. In the verification of STG's some method based on Occurrence nets (OCN) and its prefix, called unfolding, has been proposed. OCN's can represent both causality and concurrency between two nodes by net structure. In this paper, we propose a method to derive a logic function by generating substate space of a given STG using the structural properties of OCN. The proposed method can be seem as a parallel algorithm for deriving a logic function.
ER -
English
