A Clock-Feedthrough and Offset Compensated Fully-Differential Switched-Current Circuit
Summary :
A fully-differential switched-current (SI) circuit provided with clock-feedthrough (CFT) and common mode rejection and offset compensation schemes is described. Different from a conventional SI memory cell, it takes the difference between two differential inputs to deliver the balanced differential currents. Transistor level simulations and error analyses are given to demonstrate its performance.
- Publication
- IEICE TRANSACTIONS on Fundamentals Vol.E78-A No.11 pp.1531-1533
- Publication Date
- 1995/11/25
- Publicized
- Online ISSN
- DOI
- Type of Manuscript
- Special Section LETTER (Special Section of Letters Selected from the 1995 IEICE General Conference)
- Category
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Hyeong-Woo CHA, Kenzo WATANABE, "A Clock-Feedthrough and Offset Compensated Fully-Differential Switched-Current Circuit" in IEICE TRANSACTIONS on Fundamentals,
vol. E78-A, no. 11, pp. 1531-1533, November 1995, doi: .
Abstract: A fully-differential switched-current (SI) circuit provided with clock-feedthrough (CFT) and common mode rejection and offset compensation schemes is described. Different from a conventional SI memory cell, it takes the difference between two differential inputs to deliver the balanced differential currents. Transistor level simulations and error analyses are given to demonstrate its performance.
URL: https://global.ieice.org/en_transactions/fundamentals/10.1587/e78-a_11_1531/_p
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@ARTICLE{e78-a_11_1531,
author={Hyeong-Woo CHA, Kenzo WATANABE, },
journal={IEICE TRANSACTIONS on Fundamentals},
title={A Clock-Feedthrough and Offset Compensated Fully-Differential Switched-Current Circuit},
year={1995},
volume={E78-A},
number={11},
pages={1531-1533},
abstract={A fully-differential switched-current (SI) circuit provided with clock-feedthrough (CFT) and common mode rejection and offset compensation schemes is described. Different from a conventional SI memory cell, it takes the difference between two differential inputs to deliver the balanced differential currents. Transistor level simulations and error analyses are given to demonstrate its performance.},
keywords={},
doi={},
ISSN={},
month={November},}
Copy
TY - JOUR
TI - A Clock-Feedthrough and Offset Compensated Fully-Differential Switched-Current Circuit
T2 - IEICE TRANSACTIONS on Fundamentals
SP - 1531
EP - 1533
AU - Hyeong-Woo CHA
AU - Kenzo WATANABE
PY - 1995
DO -
JO - IEICE TRANSACTIONS on Fundamentals
SN -
VL - E78-A
IS - 11
JA - IEICE TRANSACTIONS on Fundamentals
Y1 - November 1995
AB - A fully-differential switched-current (SI) circuit provided with clock-feedthrough (CFT) and common mode rejection and offset compensation schemes is described. Different from a conventional SI memory cell, it takes the difference between two differential inputs to deliver the balanced differential currents. Transistor level simulations and error analyses are given to demonstrate its performance.
ER -
English
