This paper is described on the realization of simulated inductance cercuit with parallel negative conductance and its application for an oscillator. The design's condition for realizing the circuit needs stability, narrow expance of elements, larger dynamic-range and lower sensitivity. A new floating simulated inductance circuit with parallel nagative conductance with two operational amplifiers, four resistors, and four capacitors is created by using the design's algorithm. And the elements sensitivity of the simulated circuit is superior to that of the conventional circuits. By experimenting with a resonance circuit, the author tested the sinusoidal oscillator's circuit of a parallel -GLC as an application in order to confirm the operation of the simulated inductance circuit with parallel negative conductance.
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Yukio IMAI, "Simulated Inductance Circuit with Parallel Negative Conductance and Its Application for a Sinusoidal Oscillator" in IEICE TRANSACTIONS on Fundamentals,
vol. E79-A, no. 5, pp. 634-638, May 1996, doi: .
Abstract: This paper is described on the realization of simulated inductance cercuit with parallel negative conductance and its application for an oscillator. The design's condition for realizing the circuit needs stability, narrow expance of elements, larger dynamic-range and lower sensitivity. A new floating simulated inductance circuit with parallel nagative conductance with two operational amplifiers, four resistors, and four capacitors is created by using the design's algorithm. And the elements sensitivity of the simulated circuit is superior to that of the conventional circuits. By experimenting with a resonance circuit, the author tested the sinusoidal oscillator's circuit of a parallel -GLC as an application in order to confirm the operation of the simulated inductance circuit with parallel negative conductance.
URL: https://global.ieice.org/en_transactions/fundamentals/10.1587/e79-a_5_634/_p
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@ARTICLE{e79-a_5_634,
author={Yukio IMAI, },
journal={IEICE TRANSACTIONS on Fundamentals},
title={Simulated Inductance Circuit with Parallel Negative Conductance and Its Application for a Sinusoidal Oscillator},
year={1996},
volume={E79-A},
number={5},
pages={634-638},
abstract={This paper is described on the realization of simulated inductance cercuit with parallel negative conductance and its application for an oscillator. The design's condition for realizing the circuit needs stability, narrow expance of elements, larger dynamic-range and lower sensitivity. A new floating simulated inductance circuit with parallel nagative conductance with two operational amplifiers, four resistors, and four capacitors is created by using the design's algorithm. And the elements sensitivity of the simulated circuit is superior to that of the conventional circuits. By experimenting with a resonance circuit, the author tested the sinusoidal oscillator's circuit of a parallel -GLC as an application in order to confirm the operation of the simulated inductance circuit with parallel negative conductance.},
keywords={},
doi={},
ISSN={},
month={May},}
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TY - JOUR
TI - Simulated Inductance Circuit with Parallel Negative Conductance and Its Application for a Sinusoidal Oscillator
T2 - IEICE TRANSACTIONS on Fundamentals
SP - 634
EP - 638
AU - Yukio IMAI
PY - 1996
DO -
JO - IEICE TRANSACTIONS on Fundamentals
SN -
VL - E79-A
IS - 5
JA - IEICE TRANSACTIONS on Fundamentals
Y1 - May 1996
AB - This paper is described on the realization of simulated inductance cercuit with parallel negative conductance and its application for an oscillator. The design's condition for realizing the circuit needs stability, narrow expance of elements, larger dynamic-range and lower sensitivity. A new floating simulated inductance circuit with parallel nagative conductance with two operational amplifiers, four resistors, and four capacitors is created by using the design's algorithm. And the elements sensitivity of the simulated circuit is superior to that of the conventional circuits. By experimenting with a resonance circuit, the author tested the sinusoidal oscillator's circuit of a parallel -GLC as an application in order to confirm the operation of the simulated inductance circuit with parallel negative conductance.
ER -