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IEICE TRANSACTIONS on Fundamentals

Design Optimization by Using Flexible Pipelined Modules

Masahiro FUKUI, Masakazu TANAKA, Masaharu IMAI

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Summary :

This paper proposes a new flexible hardware model for pipelined design optimization. Using together with an RTL floorplanner, the flexible hardware model makes accurate and fine design space exploration possible. It is quite effective for deep submicron technology since estimation at high level has become a difficult problem and the design tuning at lower level of abstraction makes up the full design optimization task. The experimental results show that our approach reduces the slack time in the pipeline stages then achieves higher performance with a smaller area.

Publication
IEICE TRANSACTIONS on Fundamentals Vol.E81-A No.12 pp.2521-2528
Publication Date
1998/12/25
Publicized
Online ISSN
DOI
Type of Manuscript
Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category
Timing Verification and Optimization

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