IEICE TRANSACTIONS on Fundamentals
CAM Processor Synthesis Based on Behavioral Descriptions
Summary :
CAM (Content Addressable Memory) units are generally designed so that they can be applied to variety of application programs. However, if a particular application runs on CAM units, some functions in CAM units may be often used and other functions may never be used. We consider that appropriate design for CAM units is required depending on the requirements for a given application program. This paper proposes a CAM processor synthesis system based on behavioral descriptions. The input of the system is an application program written in C including CAM functions, and its output is hardware descriptions of a synthesized processor and a binary code executed on it. Since the system determines functions in CAM units and synthesizes a CAM processor depending on the requirements of an application program, we expect that a synthesized CAM processor can execute the application program with small processor area and delay. Experimental results demonstrate its efficiency and effectiveness.
- Publication
- IEICE TRANSACTIONS on Fundamentals Vol.E83-A No.12 pp.2464-2473
- Publication Date
- 2000/12/25
- Publicized
- Online ISSN
- DOI
- Type of Manuscript
- Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
- Category
- Co-design and High-level Synthesis
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Keyword
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Nozomu TOGAWA, Tatsuhiko WAKUI, Tatsuhiko YODEN, Makoto TERAJIMA, Masao YANAGISAWA, Tatsuo OHTSUKI, "CAM Processor Synthesis Based on Behavioral Descriptions" in IEICE TRANSACTIONS on Fundamentals,
vol. E83-A, no. 12, pp. 2464-2473, December 2000, doi: .
Abstract: CAM (Content Addressable Memory) units are generally designed so that they can be applied to variety of application programs. However, if a particular application runs on CAM units, some functions in CAM units may be often used and other functions may never be used. We consider that appropriate design for CAM units is required depending on the requirements for a given application program. This paper proposes a CAM processor synthesis system based on behavioral descriptions. The input of the system is an application program written in C including CAM functions, and its output is hardware descriptions of a synthesized processor and a binary code executed on it. Since the system determines functions in CAM units and synthesizes a CAM processor depending on the requirements of an application program, we expect that a synthesized CAM processor can execute the application program with small processor area and delay. Experimental results demonstrate its efficiency and effectiveness.
URL: https://global.ieice.org/en_transactions/fundamentals/10.1587/e83-a_12_2464/_p
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@ARTICLE{e83-a_12_2464,
author={Nozomu TOGAWA, Tatsuhiko WAKUI, Tatsuhiko YODEN, Makoto TERAJIMA, Masao YANAGISAWA, Tatsuo OHTSUKI, },
journal={IEICE TRANSACTIONS on Fundamentals},
title={CAM Processor Synthesis Based on Behavioral Descriptions},
year={2000},
volume={E83-A},
number={12},
pages={2464-2473},
abstract={CAM (Content Addressable Memory) units are generally designed so that they can be applied to variety of application programs. However, if a particular application runs on CAM units, some functions in CAM units may be often used and other functions may never be used. We consider that appropriate design for CAM units is required depending on the requirements for a given application program. This paper proposes a CAM processor synthesis system based on behavioral descriptions. The input of the system is an application program written in C including CAM functions, and its output is hardware descriptions of a synthesized processor and a binary code executed on it. Since the system determines functions in CAM units and synthesizes a CAM processor depending on the requirements of an application program, we expect that a synthesized CAM processor can execute the application program with small processor area and delay. Experimental results demonstrate its efficiency and effectiveness.},
keywords={},
doi={},
ISSN={},
month={December},}
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TY - JOUR
TI - CAM Processor Synthesis Based on Behavioral Descriptions
T2 - IEICE TRANSACTIONS on Fundamentals
SP - 2464
EP - 2473
AU - Nozomu TOGAWA
AU - Tatsuhiko WAKUI
AU - Tatsuhiko YODEN
AU - Makoto TERAJIMA
AU - Masao YANAGISAWA
AU - Tatsuo OHTSUKI
PY - 2000
DO -
JO - IEICE TRANSACTIONS on Fundamentals
SN -
VL - E83-A
IS - 12
JA - IEICE TRANSACTIONS on Fundamentals
Y1 - December 2000
AB - CAM (Content Addressable Memory) units are generally designed so that they can be applied to variety of application programs. However, if a particular application runs on CAM units, some functions in CAM units may be often used and other functions may never be used. We consider that appropriate design for CAM units is required depending on the requirements for a given application program. This paper proposes a CAM processor synthesis system based on behavioral descriptions. The input of the system is an application program written in C including CAM functions, and its output is hardware descriptions of a synthesized processor and a binary code executed on it. Since the system determines functions in CAM units and synthesizes a CAM processor depending on the requirements of an application program, we expect that a synthesized CAM processor can execute the application program with small processor area and delay. Experimental results demonstrate its efficiency and effectiveness.
ER -
English
