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Design of a Low Power Consumption Pulse-Shaping 1:4 Interpolation FIR Filter for W-CDMA Applications

Keun-Jang RYOO, Jong-Wha CHONG

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Summary :

This paper presents the design and simulation of a power efficient 1:4 interpolation FIR filter with partitioned look Up Table (LUT) structure. Using the symmetry of the filter coefficients and the contents of the LUT, the area of the proposed filter is minimized. The two filters share the partitioned LUT and activate the LUT selectively to realize the low power operation. Experimental results suggest that the proposed filter reduces the power consumption by 25% and simultaneously reduces the gate area by 7% compared to the previously proposed single-architecture dual-channel filter.

Publication
IEICE TRANSACTIONS on Fundamentals Vol.E83-A No.12 pp.2627-2630
Publication Date
2000/12/25
Publicized
Online ISSN
DOI
Type of Manuscript
Special Section LETTER (Special Section on VLSI Design and CAD Algorithms)
Category
Analog Circuit Design

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