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Generalized Reasoning Scheme for Redundancy Addition and Removal

Jose Alberto ESPEJO, Luis ENTRENA, Enrique San MILLAN, Celia LOPEZ

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Summary :

This work provides a generalization of structural logic optimization methods to general boolean networks. This generalization is based on a functional description of the nodes in the network. Therefore, this approach is no longer restricted to networks that consist of simple gates. Within this framework, we present necessary and sufficient conditions to identify all the possible functional expansions of a node that allow to eliminate a wire elsewhere in the network. These conditions are also given for the case of multiple variable expansion, providing an incremental mechanism to perform functional transformations involving any number of variables that can be applied in a very efficient manner. On the other hand, we will show in this paper that relevant simplifications can be obtained when this framework is applied to the particular case of AND-OR-NOT networks, resulting in important savings in the computational effort. When compared to previous approaches, the experimental results show an important reduction in the number of computations required.

Publication
IEICE TRANSACTIONS on Fundamentals Vol.E84-A No.11 pp.2665-2672
Publication Date
2001/11/01
Publicized
Online ISSN
DOI
Type of Manuscript
Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category
Logic Synthesis

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