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IEICE TRANSACTIONS on Fundamentals

A High-Level Energy-Optimizing Algorithm for System VLSIs Based on Area/Time/Power Estimation

Shinichi NODA, Nozomu TOGAWA, Masao YANAGISAWA, Tatsuo OHTSUKI

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Summary :

This paper proposes a high-level energy-optimizing algorithm which can synthesize low energy system VLSIs. Given an initial system hardware obtained from an abstract behavioral description, the proposed algorithm applies to it the three energy reduction techniques, 1) reducing supply voltage, 2) selecting lower energy modules, and 3) applying gated clocks. By incorporating our area/delay/power estimation, the proposed algorithm can obtain low energy system VLSIs meeting the constraints of area, delay, and execution time. The proposed algorithm has been incorporated into a high-level synthesis system and experimental results demonstrate effectiveness and efficiency of the algorithm.

Publication
IEICE TRANSACTIONS on Fundamentals Vol.E85-A No.12 pp.2655-2666
Publication Date
2002/12/01
Publicized
Online ISSN
DOI
Type of Manuscript
Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category
High Level Synthesis

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