This paper proposes a high-level energy-optimizing algorithm which can synthesize low energy system VLSIs. Given an initial system hardware obtained from an abstract behavioral description, the proposed algorithm applies to it the three energy reduction techniques, 1) reducing supply voltage, 2) selecting lower energy modules, and 3) applying gated clocks. By incorporating our area/delay/power estimation, the proposed algorithm can obtain low energy system VLSIs meeting the constraints of area, delay, and execution time. The proposed algorithm has been incorporated into a high-level synthesis system and experimental results demonstrate effectiveness and efficiency of the algorithm.
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Shinichi NODA, Nozomu TOGAWA, Masao YANAGISAWA, Tatsuo OHTSUKI, "A High-Level Energy-Optimizing Algorithm for System VLSIs Based on Area/Time/Power Estimation" in IEICE TRANSACTIONS on Fundamentals,
vol. E85-A, no. 12, pp. 2655-2666, December 2002, doi: .
Abstract: This paper proposes a high-level energy-optimizing algorithm which can synthesize low energy system VLSIs. Given an initial system hardware obtained from an abstract behavioral description, the proposed algorithm applies to it the three energy reduction techniques, 1) reducing supply voltage, 2) selecting lower energy modules, and 3) applying gated clocks. By incorporating our area/delay/power estimation, the proposed algorithm can obtain low energy system VLSIs meeting the constraints of area, delay, and execution time. The proposed algorithm has been incorporated into a high-level synthesis system and experimental results demonstrate effectiveness and efficiency of the algorithm.
URL: https://global.ieice.org/en_transactions/fundamentals/10.1587/e85-a_12_2655/_p
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@ARTICLE{e85-a_12_2655,
author={Shinichi NODA, Nozomu TOGAWA, Masao YANAGISAWA, Tatsuo OHTSUKI, },
journal={IEICE TRANSACTIONS on Fundamentals},
title={A High-Level Energy-Optimizing Algorithm for System VLSIs Based on Area/Time/Power Estimation},
year={2002},
volume={E85-A},
number={12},
pages={2655-2666},
abstract={This paper proposes a high-level energy-optimizing algorithm which can synthesize low energy system VLSIs. Given an initial system hardware obtained from an abstract behavioral description, the proposed algorithm applies to it the three energy reduction techniques, 1) reducing supply voltage, 2) selecting lower energy modules, and 3) applying gated clocks. By incorporating our area/delay/power estimation, the proposed algorithm can obtain low energy system VLSIs meeting the constraints of area, delay, and execution time. The proposed algorithm has been incorporated into a high-level synthesis system and experimental results demonstrate effectiveness and efficiency of the algorithm.},
keywords={},
doi={},
ISSN={},
month={December},}
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TY - JOUR
TI - A High-Level Energy-Optimizing Algorithm for System VLSIs Based on Area/Time/Power Estimation
T2 - IEICE TRANSACTIONS on Fundamentals
SP - 2655
EP - 2666
AU - Shinichi NODA
AU - Nozomu TOGAWA
AU - Masao YANAGISAWA
AU - Tatsuo OHTSUKI
PY - 2002
DO -
JO - IEICE TRANSACTIONS on Fundamentals
SN -
VL - E85-A
IS - 12
JA - IEICE TRANSACTIONS on Fundamentals
Y1 - December 2002
AB - This paper proposes a high-level energy-optimizing algorithm which can synthesize low energy system VLSIs. Given an initial system hardware obtained from an abstract behavioral description, the proposed algorithm applies to it the three energy reduction techniques, 1) reducing supply voltage, 2) selecting lower energy modules, and 3) applying gated clocks. By incorporating our area/delay/power estimation, the proposed algorithm can obtain low energy system VLSIs meeting the constraints of area, delay, and execution time. The proposed algorithm has been incorporated into a high-level synthesis system and experimental results demonstrate effectiveness and efficiency of the algorithm.
ER -