Intelligent Signal Processing Based on a Psychologically-Inspired VLSI Brain Model

Tadashi SHIBATA

Intelligent Signal Processing Based on a Psychologically-Inspired VLSI Brain Model

Tadashi SHIBATA

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Despite the enormous power of present-day computers, digital systems cannot respond to real-world events in real time. Biological systems, however, while being built with very slow chemical transistors, are very fast in such tasks like seeing, recognizing, and taking immediate actions. This paper discusses the issue of how we can build real-time intelligent systems directly on silicon. An intelligent VLSI system inspired by a psychological brain model is proposed. The system stores the past experience in the on-chip vast memory and recalls the maximum likelihood event to the current input based on the associative processor architecture. Although the system can be implemented in a CMOS digital technology, we are proposing here to implement the system using circuits operating in the analog/digital-merged decision making principle. Low-level processing is done in the analog domain in a fully parallel manner, which is immediately followed by a binary decision to yield answers in digital formats. Such a scheme would be very advantageous in achieving a high throughput computation under limited memory and computational resources usually encountered in mobile applications. Hardware-friendly algorithms have been developed for real-time image recognition using the associative processor architecture and some experimental results are demonstrated.

Publication: IEICE TRANSACTIONS on Fundamentals Vol.E85-A No.3 pp.600-609

Publication Date: 2002/03/01

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Type of Manuscript: Special Section INVITED PAPER (Special Section on the Trend of Digital Signal Processing and Its Future Direction)

Category: LSI/Signal Processors

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Tadashi SHIBATA, "Intelligent Signal Processing Based on a Psychologically-Inspired VLSI Brain Model" in IEICE TRANSACTIONS on Fundamentals, vol. E85-A, no. 3, pp. 600-609, March 2002, doi: .
Abstract: Despite the enormous power of present-day computers, digital systems cannot respond to real-world events in real time. Biological systems, however, while being built with very slow chemical transistors, are very fast in such tasks like seeing, recognizing, and taking immediate actions. This paper discusses the issue of how we can build real-time intelligent systems directly on silicon. An intelligent VLSI system inspired by a psychological brain model is proposed. The system stores the past experience in the on-chip vast memory and recalls the maximum likelihood event to the current input based on the associative processor architecture. Although the system can be implemented in a CMOS digital technology, we are proposing here to implement the system using circuits operating in the analog/digital-merged decision making principle. Low-level processing is done in the analog domain in a fully parallel manner, which is immediately followed by a binary decision to yield answers in digital formats. Such a scheme would be very advantageous in achieving a high throughput computation under limited memory and computational resources usually encountered in mobile applications. Hardware-friendly algorithms have been developed for real-time image recognition using the associative processor architecture and some experimental results are demonstrated.
URL: https://global.ieice.org/en_transactions/fundamentals/10.1587/e85-a_3_600/_p

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@ARTICLE{e85-a_3_600,
author={Tadashi SHIBATA, },
journal={IEICE TRANSACTIONS on Fundamentals},
title={Intelligent Signal Processing Based on a Psychologically-Inspired VLSI Brain Model},
year={2002},
volume={E85-A},
number={3},
pages={600-609},
abstract={Despite the enormous power of present-day computers, digital systems cannot respond to real-world events in real time. Biological systems, however, while being built with very slow chemical transistors, are very fast in such tasks like seeing, recognizing, and taking immediate actions. This paper discusses the issue of how we can build real-time intelligent systems directly on silicon. An intelligent VLSI system inspired by a psychological brain model is proposed. The system stores the past experience in the on-chip vast memory and recalls the maximum likelihood event to the current input based on the associative processor architecture. Although the system can be implemented in a CMOS digital technology, we are proposing here to implement the system using circuits operating in the analog/digital-merged decision making principle. Low-level processing is done in the analog domain in a fully parallel manner, which is immediately followed by a binary decision to yield answers in digital formats. Such a scheme would be very advantageous in achieving a high throughput computation under limited memory and computational resources usually encountered in mobile applications. Hardware-friendly algorithms have been developed for real-time image recognition using the associative processor architecture and some experimental results are demonstrated.},
keywords={},
doi={},
ISSN={},
month={March},}

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TY - JOUR
TI - Intelligent Signal Processing Based on a Psychologically-Inspired VLSI Brain Model
T2 - IEICE TRANSACTIONS on Fundamentals
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EP - 609
AU - Tadashi SHIBATA
PY - 2002
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JO - IEICE TRANSACTIONS on Fundamentals
SN -
VL - E85-A
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JA - IEICE TRANSACTIONS on Fundamentals
Y1 - March 2002
AB - Despite the enormous power of present-day computers, digital systems cannot respond to real-world events in real time. Biological systems, however, while being built with very slow chemical transistors, are very fast in such tasks like seeing, recognizing, and taking immediate actions. This paper discusses the issue of how we can build real-time intelligent systems directly on silicon. An intelligent VLSI system inspired by a psychological brain model is proposed. The system stores the past experience in the on-chip vast memory and recalls the maximum likelihood event to the current input based on the associative processor architecture. Although the system can be implemented in a CMOS digital technology, we are proposing here to implement the system using circuits operating in the analog/digital-merged decision making principle. Low-level processing is done in the analog domain in a fully parallel manner, which is immediately followed by a binary decision to yield answers in digital formats. Such a scheme would be very advantageous in achieving a high throughput computation under limited memory and computational resources usually encountered in mobile applications. Hardware-friendly algorithms have been developed for real-time image recognition using the associative processor architecture and some experimental results are demonstrated.
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