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IEICE TRANSACTIONS on Fundamentals

Compact Representations of Logic Functions Using Heterogeneous MDDs

Shinobu NAGAYAMA, Tsutomu SASAO

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Summary :

In this paper, we propose a compact representation of logic functions using Multi-valued Decision Diagrams (MDDs) called heterogeneous MDDs. In a heterogeneous MDD, each variable may take a different domain. By partitioning binary input variables and representing each partition as a single multi-valued variable, we can produce a heterogeneous MDD with 16% smaller memory size than a Reduced Ordered Binary Decision Diagram (ROBDD), and with comparable memory size to Free Binary Decision Diagrams (FBDDs). And also, heterogeneous MDDs have shorter Average Path Length (APL) than ROBDDs and FBDDs. We minimized a large number of benchmark functions to show the compactness of heterogeneous MDDs.

Publication
IEICE TRANSACTIONS on Fundamentals Vol.E86-A No.12 pp.3168-3175
Publication Date
2003/12/01
Publicized
Online ISSN
DOI
Type of Manuscript
Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category
Logic and High Level Synthesis

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