3.3 V 35 mW Second-Order Three-Bit Quadrature Band-Pass ΔΣ Modulator for Digital Radio

Hack-Soo OH; Chang-Gene WOO; Pyung CHOI; Geunbae LIM; Jang-Kyoo SHIN; Jong-Hyun LEE

3.3 V 35 mW Second-Order Three-Bit Quadrature Band-Pass ΔΣ Modulator for Digital Radio

Hack-Soo OH, Chang-Gene WOO, Pyung CHOI, Geunbae LIM, Jang-Kyoo SHIN, Jong-Hyun LEE

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Delta-sigma modulators (DSMs) are commonly use in high-resolution analog-to-digital converters, and band-pass delta-sigma modulators have recently been used to convert IF signals into digital signals. In particular, a quadrature band-pass delta-sigma modulator can achieve a lower total order, higher signal-to-noise ratio (SNR), and higher bandwidth when compared with conventional band-pass modulators. The current paper proposes a second-order three-bit quadrature band-pass delta-sigma modulator that can achieve a lower power consumption and better performance with a similar die size to a conventional fourth-order quadrature band-pass delta-sigma modulator (QBPDSM). The proposed system is integrated using CMOS 0.35 µm, double-poly, four-metal technology. The system operates at 13 MHz and can digitize a 200 kHz bandwidth signal centered at 4.875 MHz with an SNR of 85 dB. The power consumption is 35 mW at 3.3 V and 38 mW at 5 V, and the die size is 21.9 mm².

Publication: IEICE TRANSACTIONS on Fundamentals Vol.E86-A No.12 pp.3230-3239

Publication Date: 2003/12/01

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Type of Manuscript: PAPER

Category: Analog Signal Processing

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Hack-Soo OH, Chang-Gene WOO, Pyung CHOI, Geunbae LIM, Jang-Kyoo SHIN, Jong-Hyun LEE, "3.3 V 35 mW Second-Order Three-Bit Quadrature Band-Pass ΔΣ Modulator for Digital Radio" in IEICE TRANSACTIONS on Fundamentals, vol. E86-A, no. 12, pp. 3230-3239, December 2003, doi: .
Abstract: Delta-sigma modulators (DSMs) are commonly use in high-resolution analog-to-digital converters, and band-pass delta-sigma modulators have recently been used to convert IF signals into digital signals. In particular, a quadrature band-pass delta-sigma modulator can achieve a lower total order, higher signal-to-noise ratio (SNR), and higher bandwidth when compared with conventional band-pass modulators. The current paper proposes a second-order three-bit quadrature band-pass delta-sigma modulator that can achieve a lower power consumption and better performance with a similar die size to a conventional fourth-order quadrature band-pass delta-sigma modulator (QBPDSM). The proposed system is integrated using CMOS 0.35 µm, double-poly, four-metal technology. The system operates at 13 MHz and can digitize a 200 kHz bandwidth signal centered at 4.875 MHz with an SNR of 85 dB. The power consumption is 35 mW at 3.3 V and 38 mW at 5 V, and the die size is 21.9 mm².
URL: https://global.ieice.org/en_transactions/fundamentals/10.1587/e86-a_12_3230/_p

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@ARTICLE{e86-a_12_3230,
author={Hack-Soo OH, Chang-Gene WOO, Pyung CHOI, Geunbae LIM, Jang-Kyoo SHIN, Jong-Hyun LEE, },
journal={IEICE TRANSACTIONS on Fundamentals},
title={3.3 V 35 mW Second-Order Three-Bit Quadrature Band-Pass ΔΣ Modulator for Digital Radio},
year={2003},
volume={E86-A},
number={12},
pages={3230-3239},
abstract={Delta-sigma modulators (DSMs) are commonly use in high-resolution analog-to-digital converters, and band-pass delta-sigma modulators have recently been used to convert IF signals into digital signals. In particular, a quadrature band-pass delta-sigma modulator can achieve a lower total order, higher signal-to-noise ratio (SNR), and higher bandwidth when compared with conventional band-pass modulators. The current paper proposes a second-order three-bit quadrature band-pass delta-sigma modulator that can achieve a lower power consumption and better performance with a similar die size to a conventional fourth-order quadrature band-pass delta-sigma modulator (QBPDSM). The proposed system is integrated using CMOS 0.35 µm, double-poly, four-metal technology. The system operates at 13 MHz and can digitize a 200 kHz bandwidth signal centered at 4.875 MHz with an SNR of 85 dB. The power consumption is 35 mW at 3.3 V and 38 mW at 5 V, and the die size is 21.9 mm².},
keywords={},
doi={},
ISSN={},
month={December},}

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TY - JOUR
TI - 3.3 V 35 mW Second-Order Three-Bit Quadrature Band-Pass ΔΣ Modulator for Digital Radio
T2 - IEICE TRANSACTIONS on Fundamentals
SP - 3230
EP - 3239
AU - Hack-Soo OH
AU - Chang-Gene WOO
AU - Pyung CHOI
AU - Geunbae LIM
AU - Jang-Kyoo SHIN
AU - Jong-Hyun LEE
PY - 2003
DO -
JO - IEICE TRANSACTIONS on Fundamentals
SN -
VL - E86-A
IS - 12
JA - IEICE TRANSACTIONS on Fundamentals
Y1 - December 2003
AB - Delta-sigma modulators (DSMs) are commonly use in high-resolution analog-to-digital converters, and band-pass delta-sigma modulators have recently been used to convert IF signals into digital signals. In particular, a quadrature band-pass delta-sigma modulator can achieve a lower total order, higher signal-to-noise ratio (SNR), and higher bandwidth when compared with conventional band-pass modulators. The current paper proposes a second-order three-bit quadrature band-pass delta-sigma modulator that can achieve a lower power consumption and better performance with a similar die size to a conventional fourth-order quadrature band-pass delta-sigma modulator (QBPDSM). The proposed system is integrated using CMOS 0.35 µm, double-poly, four-metal technology. The system operates at 13 MHz and can digitize a 200 kHz bandwidth signal centered at 4.875 MHz with an SNR of 85 dB. The power consumption is 35 mW at 3.3 V and 38 mW at 5 V, and the die size is 21.9 mm².
ER -