In this paper, a fragment-processing solution in 3D graphics rendering algorithms based on fragment lists (i.e. A-buffer) for minimizing loss of image quality is described. While all fragment information should be preserved for exact hidden surface removal, this places additional strain on hardware in terms of silicon gates and clock cycles. Therefore, we propose a fragment processing technique that can effectively merge fragments in order to decrease the depth of fragment lists. It renders scenes quite accurately even in the case when three fragments intersect each other. This algorithm improves hardware acceleration without deteriorating image quality.
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Donghyun KIM, Lee-Sup KIM, "An Efficient Fragment Processing Technique in A-Buffer Implementation" in IEICE TRANSACTIONS on Fundamentals,
vol. E87-A, no. 1, pp. 258-269, January 2004, doi: .
Abstract: In this paper, a fragment-processing solution in 3D graphics rendering algorithms based on fragment lists (i.e. A-buffer) for minimizing loss of image quality is described. While all fragment information should be preserved for exact hidden surface removal, this places additional strain on hardware in terms of silicon gates and clock cycles. Therefore, we propose a fragment processing technique that can effectively merge fragments in order to decrease the depth of fragment lists. It renders scenes quite accurately even in the case when three fragments intersect each other. This algorithm improves hardware acceleration without deteriorating image quality.
URL: https://global.ieice.org/en_transactions/fundamentals/10.1587/e87-a_1_258/_p
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@ARTICLE{e87-a_1_258,
author={Donghyun KIM, Lee-Sup KIM, },
journal={IEICE TRANSACTIONS on Fundamentals},
title={An Efficient Fragment Processing Technique in A-Buffer Implementation},
year={2004},
volume={E87-A},
number={1},
pages={258-269},
abstract={In this paper, a fragment-processing solution in 3D graphics rendering algorithms based on fragment lists (i.e. A-buffer) for minimizing loss of image quality is described. While all fragment information should be preserved for exact hidden surface removal, this places additional strain on hardware in terms of silicon gates and clock cycles. Therefore, we propose a fragment processing technique that can effectively merge fragments in order to decrease the depth of fragment lists. It renders scenes quite accurately even in the case when three fragments intersect each other. This algorithm improves hardware acceleration without deteriorating image quality.},
keywords={},
doi={},
ISSN={},
month={January},}
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TY - JOUR
TI - An Efficient Fragment Processing Technique in A-Buffer Implementation
T2 - IEICE TRANSACTIONS on Fundamentals
SP - 258
EP - 269
AU - Donghyun KIM
AU - Lee-Sup KIM
PY - 2004
DO -
JO - IEICE TRANSACTIONS on Fundamentals
SN -
VL - E87-A
IS - 1
JA - IEICE TRANSACTIONS on Fundamentals
Y1 - January 2004
AB - In this paper, a fragment-processing solution in 3D graphics rendering algorithms based on fragment lists (i.e. A-buffer) for minimizing loss of image quality is described. While all fragment information should be preserved for exact hidden surface removal, this places additional strain on hardware in terms of silicon gates and clock cycles. Therefore, we propose a fragment processing technique that can effectively merge fragments in order to decrease the depth of fragment lists. It renders scenes quite accurately even in the case when three fragments intersect each other. This algorithm improves hardware acceleration without deteriorating image quality.
ER -