IEICE TRANSACTIONS on Fundamentals
An Integrated Wideband Operational Transconductance Amplifier with Complementary Slew-Rate Enhancer
Summary :
The paper presents a low power, wideband operational trans-conductance amplifier (OTA) for applications to drive large capacitive loads. In order to satisfy the low static power dissipation, high-speed, while reserving high current driving capability, the complementary slew-rate enhancer in conjunction with a dual class AB input stage to improve the slew-rate of a rail-to-rail two-stage OTA is proposed. The proposed architecture was implemented using 0.5µm CMOS process with a supply voltage of 5V. The slew-rate can achieve 68V/µsec at static power dissipation of 0.9mW, which can be used to efficiently drive larger than 6 nF capacitive load. The measured output has a total harmonic distortion of less than 5%.
- Publication
- IEICE TRANSACTIONS on Fundamentals Vol.E103-A No.1 pp.295-296
- Publication Date
- 2020/01/01
- Publicized
- Online ISSN
- 1745-1337
- DOI
- 10.1587/transfun.2019WBL0003
- Type of Manuscript
- Special Section LETTER (Special Section on Wideband Systems)
- Category
Authors
Deng-Fong LU
National Central University
Chin HSIA
National Central University
Kun-Chu LEE
National Central University
Keyword
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Deng-Fong LU, Chin HSIA, Kun-Chu LEE, "An Integrated Wideband Operational Transconductance Amplifier with Complementary Slew-Rate Enhancer" in IEICE TRANSACTIONS on Fundamentals,
vol. E103-A, no. 1, pp. 295-296, January 2020, doi: 10.1587/transfun.2019WBL0003.
Abstract: The paper presents a low power, wideband operational trans-conductance amplifier (OTA) for applications to drive large capacitive loads. In order to satisfy the low static power dissipation, high-speed, while reserving high current driving capability, the complementary slew-rate enhancer in conjunction with a dual class AB input stage to improve the slew-rate of a rail-to-rail two-stage OTA is proposed. The proposed architecture was implemented using 0.5µm CMOS process with a supply voltage of 5V. The slew-rate can achieve 68V/µsec at static power dissipation of 0.9mW, which can be used to efficiently drive larger than 6 nF capacitive load. The measured output has a total harmonic distortion of less than 5%.
URL: https://global.ieice.org/en_transactions/fundamentals/10.1587/transfun.2019WBL0003/_p
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@ARTICLE{e103-a_1_295,
author={Deng-Fong LU, Chin HSIA, Kun-Chu LEE, },
journal={IEICE TRANSACTIONS on Fundamentals},
title={An Integrated Wideband Operational Transconductance Amplifier with Complementary Slew-Rate Enhancer},
year={2020},
volume={E103-A},
number={1},
pages={295-296},
abstract={The paper presents a low power, wideband operational trans-conductance amplifier (OTA) for applications to drive large capacitive loads. In order to satisfy the low static power dissipation, high-speed, while reserving high current driving capability, the complementary slew-rate enhancer in conjunction with a dual class AB input stage to improve the slew-rate of a rail-to-rail two-stage OTA is proposed. The proposed architecture was implemented using 0.5µm CMOS process with a supply voltage of 5V. The slew-rate can achieve 68V/µsec at static power dissipation of 0.9mW, which can be used to efficiently drive larger than 6 nF capacitive load. The measured output has a total harmonic distortion of less than 5%.},
keywords={},
doi={10.1587/transfun.2019WBL0003},
ISSN={1745-1337},
month={January},}
Copy
TY - JOUR
TI - An Integrated Wideband Operational Transconductance Amplifier with Complementary Slew-Rate Enhancer
T2 - IEICE TRANSACTIONS on Fundamentals
SP - 295
EP - 296
AU - Deng-Fong LU
AU - Chin HSIA
AU - Kun-Chu LEE
PY - 2020
DO - 10.1587/transfun.2019WBL0003
JO - IEICE TRANSACTIONS on Fundamentals
SN - 1745-1337
VL - E103-A
IS - 1
JA - IEICE TRANSACTIONS on Fundamentals
Y1 - January 2020
AB - The paper presents a low power, wideband operational trans-conductance amplifier (OTA) for applications to drive large capacitive loads. In order to satisfy the low static power dissipation, high-speed, while reserving high current driving capability, the complementary slew-rate enhancer in conjunction with a dual class AB input stage to improve the slew-rate of a rail-to-rail two-stage OTA is proposed. The proposed architecture was implemented using 0.5µm CMOS process with a supply voltage of 5V. The slew-rate can achieve 68V/µsec at static power dissipation of 0.9mW, which can be used to efficiently drive larger than 6 nF capacitive load. The measured output has a total harmonic distortion of less than 5%.
ER -
English
