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IEICE TRANSACTIONS on Fundamentals

FPGA Implementation and Evaluation of a Real-Time Image-Based Vibration Detection System with Adaptive Filtering

Taito MANABE, Kazuya UETSUHARA, Akane TAHARA, Yuichiro SHIBATA

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Summary :

This paper shows design and implementation of an image-based vibration detection system on a field-programmable gate array (FPGA), aiming at application to tremor suppression for microsurgery assistance systems. The system can extract a vibration component within a user-specified frequency band from moving images in real-time. For fast and robust detection, we employ a statistical approach using dense optical flow to derive vibration component, and design a custom hardware based on the Lucas-Kanade (LK) method to compute optical flow. And for band-pass filtering without phase delay, we implement the band-limited multiple Fourier linear combiner (BMFLC), a sort of adaptive band-pass filter which can recompose an input signal as a mixture of sinusoidal signals with multiple frequencies within the specified band, with no phase delay. The whole system is implemented as a deep pipeline on a Xilinx Kintex-7 XC7K325T FPGA without using any external memory. We employ fixed-point arithmetic to reduce resource utilization while maintaining accuracy close to double-precision floating-point arithmetic. Empirical experiments reveal that the proposed system extracts a high-frequency tremor component from hand motions, with intentional low-frequency motions successfully filtered out. The system can process VGA moving images at 60fps, with a delay of less than 1 µs for the BMFLC, suggesting effectiveness of the deep pipelined architecture. In addition, we are planning to integrate a CNN-based segmentation system for improving detection accuracy, and show preliminary software evaluation results.

Publication
IEICE TRANSACTIONS on Fundamentals Vol.E103-A No.12 pp.1472-1480
Publication Date
2020/12/01
Publicized
Online ISSN
1745-1337
DOI
10.1587/transfun.2020VLP0002
Type of Manuscript
Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category

Authors

Taito MANABE
  Nagasaki University
Kazuya UETSUHARA
  Nagasaki University
Akane TAHARA
  Nagasaki University
Yuichiro SHIBATA
  Nagasaki University

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