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High level synthesis (HLS) is a source-code-driven Register Transfer Level (RTL) design tool, and the performance, the power consumption, and the area of a generated RTL are limited partly by the description of a HLS input source code. In order to break through such kind of limitation and to get a further optimized RTL, the optimization of the input source code is indispensable. Routing congestion is one of such problems we need to consider the refinement of a HLS input source code. In this paper, we propose a novel HLS flow that performs code improvements by detecting congested parts directly from HLS input source code without using physical logic synthesis, and regenerating the input source code for HLS. In our approach, the origin of the wire congestion is detected from the HLS input source code by applying pattern matching on Program-Dependence Graph (PDG) constructed from the HLS input source code, the possibility of wire congestion is reported.
Masato TATSUOKA
Japan Advanced Institute of Science and Technology
Mineo KANEKO
Japan Advanced Institute of Science and Technology
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Masato TATSUOKA, Mineo KANEKO, "High Level Congestion Detection from C/C++ Source Code for High Level Synthesis" in IEICE TRANSACTIONS on Fundamentals,
vol. E103-A, no. 12, pp. 1437-1446, December 2020, doi: 10.1587/transfun.2020VLP0012.
Abstract: High level synthesis (HLS) is a source-code-driven Register Transfer Level (RTL) design tool, and the performance, the power consumption, and the area of a generated RTL are limited partly by the description of a HLS input source code. In order to break through such kind of limitation and to get a further optimized RTL, the optimization of the input source code is indispensable. Routing congestion is one of such problems we need to consider the refinement of a HLS input source code. In this paper, we propose a novel HLS flow that performs code improvements by detecting congested parts directly from HLS input source code without using physical logic synthesis, and regenerating the input source code for HLS. In our approach, the origin of the wire congestion is detected from the HLS input source code by applying pattern matching on Program-Dependence Graph (PDG) constructed from the HLS input source code, the possibility of wire congestion is reported.
URL: https://global.ieice.org/en_transactions/fundamentals/10.1587/transfun.2020VLP0012/_p
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@ARTICLE{e103-a_12_1437,
author={Masato TATSUOKA, Mineo KANEKO, },
journal={IEICE TRANSACTIONS on Fundamentals},
title={High Level Congestion Detection from C/C++ Source Code for High Level Synthesis},
year={2020},
volume={E103-A},
number={12},
pages={1437-1446},
abstract={High level synthesis (HLS) is a source-code-driven Register Transfer Level (RTL) design tool, and the performance, the power consumption, and the area of a generated RTL are limited partly by the description of a HLS input source code. In order to break through such kind of limitation and to get a further optimized RTL, the optimization of the input source code is indispensable. Routing congestion is one of such problems we need to consider the refinement of a HLS input source code. In this paper, we propose a novel HLS flow that performs code improvements by detecting congested parts directly from HLS input source code without using physical logic synthesis, and regenerating the input source code for HLS. In our approach, the origin of the wire congestion is detected from the HLS input source code by applying pattern matching on Program-Dependence Graph (PDG) constructed from the HLS input source code, the possibility of wire congestion is reported.},
keywords={},
doi={10.1587/transfun.2020VLP0012},
ISSN={1745-1337},
month={December},}
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TY - JOUR
TI - High Level Congestion Detection from C/C++ Source Code for High Level Synthesis
T2 - IEICE TRANSACTIONS on Fundamentals
SP - 1437
EP - 1446
AU - Masato TATSUOKA
AU - Mineo KANEKO
PY - 2020
DO - 10.1587/transfun.2020VLP0012
JO - IEICE TRANSACTIONS on Fundamentals
SN - 1745-1337
VL - E103-A
IS - 12
JA - IEICE TRANSACTIONS on Fundamentals
Y1 - December 2020
AB - High level synthesis (HLS) is a source-code-driven Register Transfer Level (RTL) design tool, and the performance, the power consumption, and the area of a generated RTL are limited partly by the description of a HLS input source code. In order to break through such kind of limitation and to get a further optimized RTL, the optimization of the input source code is indispensable. Routing congestion is one of such problems we need to consider the refinement of a HLS input source code. In this paper, we propose a novel HLS flow that performs code improvements by detecting congested parts directly from HLS input source code without using physical logic synthesis, and regenerating the input source code for HLS. In our approach, the origin of the wire congestion is detected from the HLS input source code by applying pattern matching on Program-Dependence Graph (PDG) constructed from the HLS input source code, the possibility of wire congestion is reported.
ER -