IEICE TRANSACTIONS on Fundamentals
High Performance Virtual Channel Based Fully Adaptive 3D NoC Routing for Congestion and Thermal Problem
Summary :
Recent Network on Chip (NoC) design must take the thermal issue into consideration due to its great impact on the network performance and reliability, especially for 3D NoC. In this work, we design a virtual channel based fully adaptive routing algorithm for the runtime 3D NoC thermal-aware management. To improve the network throughput and latency, we use two virtual channels for each horizontal direction and design a routing function which can not only avoid deadlock and livelock, but also ensure high adaptivity and routability in the throttled network. For path selection, we design a strategy that takes priority to the distance, but also considers path diversity and traffic state. For throttling information collection, instead of transmitting the topology information of the whole network, we use a 12 bits register to reserve the router state for one hop away, which saves the hardware cost largely and decreases the network latency. In the experiments, we test our proposed routing algorithm in different states with different sizes, and the proposed algorithm shows better network latency and throughput with low power compared with traditional algorithms.
- Publication
- IEICE TRANSACTIONS on Fundamentals Vol.E100-A No.11 pp.2379-2391
- Publication Date
- 2017/11/01
- Publicized
- Online ISSN
- 1745-1337
- DOI
- 10.1587/transfun.E100.A.2379
- Type of Manuscript
- PAPER
- Category
- VLSI Design Technology and CAD
Authors
Xin JIANG
Waseda University
Xiangyang LEI
Waseda University
Lian ZENG
Waseda University
Takahiro WATANABE
Waseda University
Keyword
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Xin JIANG, Xiangyang LEI, Lian ZENG, Takahiro WATANABE, "High Performance Virtual Channel Based Fully Adaptive 3D NoC Routing for Congestion and Thermal Problem" in IEICE TRANSACTIONS on Fundamentals,
vol. E100-A, no. 11, pp. 2379-2391, November 2017, doi: 10.1587/transfun.E100.A.2379.
Abstract: Recent Network on Chip (NoC) design must take the thermal issue into consideration due to its great impact on the network performance and reliability, especially for 3D NoC. In this work, we design a virtual channel based fully adaptive routing algorithm for the runtime 3D NoC thermal-aware management. To improve the network throughput and latency, we use two virtual channels for each horizontal direction and design a routing function which can not only avoid deadlock and livelock, but also ensure high adaptivity and routability in the throttled network. For path selection, we design a strategy that takes priority to the distance, but also considers path diversity and traffic state. For throttling information collection, instead of transmitting the topology information of the whole network, we use a 12 bits register to reserve the router state for one hop away, which saves the hardware cost largely and decreases the network latency. In the experiments, we test our proposed routing algorithm in different states with different sizes, and the proposed algorithm shows better network latency and throughput with low power compared with traditional algorithms.
URL: https://global.ieice.org/en_transactions/fundamentals/10.1587/transfun.E100.A.2379/_p
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@ARTICLE{e100-a_11_2379,
author={Xin JIANG, Xiangyang LEI, Lian ZENG, Takahiro WATANABE, },
journal={IEICE TRANSACTIONS on Fundamentals},
title={High Performance Virtual Channel Based Fully Adaptive 3D NoC Routing for Congestion and Thermal Problem},
year={2017},
volume={E100-A},
number={11},
pages={2379-2391},
abstract={Recent Network on Chip (NoC) design must take the thermal issue into consideration due to its great impact on the network performance and reliability, especially for 3D NoC. In this work, we design a virtual channel based fully adaptive routing algorithm for the runtime 3D NoC thermal-aware management. To improve the network throughput and latency, we use two virtual channels for each horizontal direction and design a routing function which can not only avoid deadlock and livelock, but also ensure high adaptivity and routability in the throttled network. For path selection, we design a strategy that takes priority to the distance, but also considers path diversity and traffic state. For throttling information collection, instead of transmitting the topology information of the whole network, we use a 12 bits register to reserve the router state for one hop away, which saves the hardware cost largely and decreases the network latency. In the experiments, we test our proposed routing algorithm in different states with different sizes, and the proposed algorithm shows better network latency and throughput with low power compared with traditional algorithms.},
keywords={},
doi={10.1587/transfun.E100.A.2379},
ISSN={1745-1337},
month={November},}
Copy
TY - JOUR
TI - High Performance Virtual Channel Based Fully Adaptive 3D NoC Routing for Congestion and Thermal Problem
T2 - IEICE TRANSACTIONS on Fundamentals
SP - 2379
EP - 2391
AU - Xin JIANG
AU - Xiangyang LEI
AU - Lian ZENG
AU - Takahiro WATANABE
PY - 2017
DO - 10.1587/transfun.E100.A.2379
JO - IEICE TRANSACTIONS on Fundamentals
SN - 1745-1337
VL - E100-A
IS - 11
JA - IEICE TRANSACTIONS on Fundamentals
Y1 - November 2017
AB - Recent Network on Chip (NoC) design must take the thermal issue into consideration due to its great impact on the network performance and reliability, especially for 3D NoC. In this work, we design a virtual channel based fully adaptive routing algorithm for the runtime 3D NoC thermal-aware management. To improve the network throughput and latency, we use two virtual channels for each horizontal direction and design a routing function which can not only avoid deadlock and livelock, but also ensure high adaptivity and routability in the throttled network. For path selection, we design a strategy that takes priority to the distance, but also considers path diversity and traffic state. For throttling information collection, instead of transmitting the topology information of the whole network, we use a 12 bits register to reserve the router state for one hop away, which saves the hardware cost largely and decreases the network latency. In the experiments, we test our proposed routing algorithm in different states with different sizes, and the proposed algorithm shows better network latency and throughput with low power compared with traditional algorithms.
ER -
English
