IEICE TRANSACTIONS on Fundamentals
Find the 'Best' Solution from Multiple Analog Topologies via Pareto-Optimality
Summary :
This paper presents a novel method using multi-objective optimization algorithm to automatically find the best solution from a topology library of analog circuits. Firstly this method abstracts the Pareto-front of each topology in the library by SPICE simulation. Then, the Pareto-front of the topology library is abstracted from the individual Pareto-fronts of topologies in the library followed by the theorem we proved. The best solution which is defined as the nearest point to specification on the Pareto-front of the topology library is then calculated by the equations derived from collinearity theorem. After the local searching using Nelder-Mead method maps the calculated best solution backs to design variable space, the non-dominated best solution is obtained. Comparing to the traditional optimization methods using single-objective optimization algorithms, this work can efficiently find the best non-dominated solution from multiple topologies for different specifications without additional time-consuming optimizing iterations. The experiments demonstrate that this method is feasible and practical in actual analog designs especially for uncertain or variant multi-dimensional specifications.
- Publication
- IEICE TRANSACTIONS on Fundamentals Vol.E92-A No.12 pp.3035-3043
- Publication Date
- 2009/12/01
- Publicized
- Online ISSN
- 1745-1337
- DOI
- 10.1587/transfun.E92.A.3035
- Type of Manuscript
- Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
- Category
- Device and Circuit Modeling and Analysis
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Yu LIU, Masato YOSHIOKA, Katsumi HOMMA, Toshiyuki SHIBUYA, "Find the 'Best' Solution from Multiple Analog Topologies via Pareto-Optimality" in IEICE TRANSACTIONS on Fundamentals,
vol. E92-A, no. 12, pp. 3035-3043, December 2009, doi: 10.1587/transfun.E92.A.3035.
Abstract: This paper presents a novel method using multi-objective optimization algorithm to automatically find the best solution from a topology library of analog circuits. Firstly this method abstracts the Pareto-front of each topology in the library by SPICE simulation. Then, the Pareto-front of the topology library is abstracted from the individual Pareto-fronts of topologies in the library followed by the theorem we proved. The best solution which is defined as the nearest point to specification on the Pareto-front of the topology library is then calculated by the equations derived from collinearity theorem. After the local searching using Nelder-Mead method maps the calculated best solution backs to design variable space, the non-dominated best solution is obtained. Comparing to the traditional optimization methods using single-objective optimization algorithms, this work can efficiently find the best non-dominated solution from multiple topologies for different specifications without additional time-consuming optimizing iterations. The experiments demonstrate that this method is feasible and practical in actual analog designs especially for uncertain or variant multi-dimensional specifications.
URL: https://global.ieice.org/en_transactions/fundamentals/10.1587/transfun.E92.A.3035/_p
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@ARTICLE{e92-a_12_3035,
author={Yu LIU, Masato YOSHIOKA, Katsumi HOMMA, Toshiyuki SHIBUYA, },
journal={IEICE TRANSACTIONS on Fundamentals},
title={Find the 'Best' Solution from Multiple Analog Topologies via Pareto-Optimality},
year={2009},
volume={E92-A},
number={12},
pages={3035-3043},
abstract={This paper presents a novel method using multi-objective optimization algorithm to automatically find the best solution from a topology library of analog circuits. Firstly this method abstracts the Pareto-front of each topology in the library by SPICE simulation. Then, the Pareto-front of the topology library is abstracted from the individual Pareto-fronts of topologies in the library followed by the theorem we proved. The best solution which is defined as the nearest point to specification on the Pareto-front of the topology library is then calculated by the equations derived from collinearity theorem. After the local searching using Nelder-Mead method maps the calculated best solution backs to design variable space, the non-dominated best solution is obtained. Comparing to the traditional optimization methods using single-objective optimization algorithms, this work can efficiently find the best non-dominated solution from multiple topologies for different specifications without additional time-consuming optimizing iterations. The experiments demonstrate that this method is feasible and practical in actual analog designs especially for uncertain or variant multi-dimensional specifications.},
keywords={},
doi={10.1587/transfun.E92.A.3035},
ISSN={1745-1337},
month={December},}
Copy
TY - JOUR
TI - Find the 'Best' Solution from Multiple Analog Topologies via Pareto-Optimality
T2 - IEICE TRANSACTIONS on Fundamentals
SP - 3035
EP - 3043
AU - Yu LIU
AU - Masato YOSHIOKA
AU - Katsumi HOMMA
AU - Toshiyuki SHIBUYA
PY - 2009
DO - 10.1587/transfun.E92.A.3035
JO - IEICE TRANSACTIONS on Fundamentals
SN - 1745-1337
VL - E92-A
IS - 12
JA - IEICE TRANSACTIONS on Fundamentals
Y1 - December 2009
AB - This paper presents a novel method using multi-objective optimization algorithm to automatically find the best solution from a topology library of analog circuits. Firstly this method abstracts the Pareto-front of each topology in the library by SPICE simulation. Then, the Pareto-front of the topology library is abstracted from the individual Pareto-fronts of topologies in the library followed by the theorem we proved. The best solution which is defined as the nearest point to specification on the Pareto-front of the topology library is then calculated by the equations derived from collinearity theorem. After the local searching using Nelder-Mead method maps the calculated best solution backs to design variable space, the non-dominated best solution is obtained. Comparing to the traditional optimization methods using single-objective optimization algorithms, this work can efficiently find the best non-dominated solution from multiple topologies for different specifications without additional time-consuming optimizing iterations. The experiments demonstrate that this method is feasible and practical in actual analog designs especially for uncertain or variant multi-dimensional specifications.
ER -
English
