Low Cost Design of an Advanced Encryption Standard (AES) Processor Using a New Common-Subexpression-Elimination Algorithm
Summary :
In this paper, we propose an area-efficient design of Advanced Encryption Standard (AES) processor by applying a new common-expression-elimination (CSE) method to the sub-functions of various transformations required in AES. The proposed method reduces the area cost of realizing the sub-functions by extracting the common factors in the bit-level XOR/AND-based sum-of-product expressions of these sub-functions using a new CSE algorithm. Cell-based implementation results show that the AES processor with our proposed CSE method has significant area improvement compared with previous designs.
- Publication
- IEICE TRANSACTIONS on Fundamentals Vol.E92-A No.12 pp.3221-3228
- Publication Date
- 2009/12/01
- Publicized
- Online ISSN
- 1745-1337
- DOI
- 10.1587/transfun.E92.A.3221
- Type of Manuscript
- Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
- Category
- Embedded, Real-Time and Reconfigurable Systems
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Keyword
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Ming-Chih CHEN, Shen-Fu HSIAO, "Low Cost Design of an Advanced Encryption Standard (AES) Processor Using a New Common-Subexpression-Elimination Algorithm" in IEICE TRANSACTIONS on Fundamentals,
vol. E92-A, no. 12, pp. 3221-3228, December 2009, doi: 10.1587/transfun.E92.A.3221.
Abstract: In this paper, we propose an area-efficient design of Advanced Encryption Standard (AES) processor by applying a new common-expression-elimination (CSE) method to the sub-functions of various transformations required in AES. The proposed method reduces the area cost of realizing the sub-functions by extracting the common factors in the bit-level XOR/AND-based sum-of-product expressions of these sub-functions using a new CSE algorithm. Cell-based implementation results show that the AES processor with our proposed CSE method has significant area improvement compared with previous designs.
URL: https://global.ieice.org/en_transactions/fundamentals/10.1587/transfun.E92.A.3221/_p
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@ARTICLE{e92-a_12_3221,
author={Ming-Chih CHEN, Shen-Fu HSIAO, },
journal={IEICE TRANSACTIONS on Fundamentals},
title={Low Cost Design of an Advanced Encryption Standard (AES) Processor Using a New Common-Subexpression-Elimination Algorithm},
year={2009},
volume={E92-A},
number={12},
pages={3221-3228},
abstract={In this paper, we propose an area-efficient design of Advanced Encryption Standard (AES) processor by applying a new common-expression-elimination (CSE) method to the sub-functions of various transformations required in AES. The proposed method reduces the area cost of realizing the sub-functions by extracting the common factors in the bit-level XOR/AND-based sum-of-product expressions of these sub-functions using a new CSE algorithm. Cell-based implementation results show that the AES processor with our proposed CSE method has significant area improvement compared with previous designs.},
keywords={},
doi={10.1587/transfun.E92.A.3221},
ISSN={1745-1337},
month={December},}
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TY - JOUR
TI - Low Cost Design of an Advanced Encryption Standard (AES) Processor Using a New Common-Subexpression-Elimination Algorithm
T2 - IEICE TRANSACTIONS on Fundamentals
SP - 3221
EP - 3228
AU - Ming-Chih CHEN
AU - Shen-Fu HSIAO
PY - 2009
DO - 10.1587/transfun.E92.A.3221
JO - IEICE TRANSACTIONS on Fundamentals
SN - 1745-1337
VL - E92-A
IS - 12
JA - IEICE TRANSACTIONS on Fundamentals
Y1 - December 2009
AB - In this paper, we propose an area-efficient design of Advanced Encryption Standard (AES) processor by applying a new common-expression-elimination (CSE) method to the sub-functions of various transformations required in AES. The proposed method reduces the area cost of realizing the sub-functions by extracting the common factors in the bit-level XOR/AND-based sum-of-product expressions of these sub-functions using a new CSE algorithm. Cell-based implementation results show that the AES processor with our proposed CSE method has significant area improvement compared with previous designs.
ER -
English
