IEICE TRANSACTIONS on Fundamentals
A Low Complexity Dual-Mode Pulse-Triggered Flip-Flop Design Based on Unified AND/XNOR Logic
Summary :
A dual-mode pulse-triggered flip-flop design supporting functional versatility is presented. A low-complexity unified logic module, consisting of only five transistors, for dual-mode pulse generation is devised using pass transistor logic (PTL). Potential threshold voltage loss problem is successfully resolved to ensure the signal integrity. Despite the extra logic for dual-mode operations, the circuit complexity of the proposed design is comparable to those of the single mode designs. Simulations in different process corners and switching activities prove the competitive performance of proposed design against various single mode designs.
- Publication
- IEICE TRANSACTIONS on Fundamentals Vol.E93-A No.12 pp.2755-2757
- Publication Date
- 2010/12/01
- Publicized
- Online ISSN
- 1745-1337
- DOI
- 10.1587/transfun.E93.A.2755
- Type of Manuscript
- LETTER
- Category
- Circuit Theory
Authors
Keyword
Latest Issue
Copyrights notice of machine-translated contents
The copyright of the original papers published on this site belongs to IEICE. Unauthorized use of the original or translated papers is prohibited. See IEICE Provisions on Copyright for details.
Cite this
Copy
Jin-Fa LIN, Yin-Tshung HWANG, Ming-Hwa SHEU, "A Low Complexity Dual-Mode Pulse-Triggered Flip-Flop Design Based on Unified AND/XNOR Logic" in IEICE TRANSACTIONS on Fundamentals,
vol. E93-A, no. 12, pp. 2755-2757, December 2010, doi: 10.1587/transfun.E93.A.2755.
Abstract: A dual-mode pulse-triggered flip-flop design supporting functional versatility is presented. A low-complexity unified logic module, consisting of only five transistors, for dual-mode pulse generation is devised using pass transistor logic (PTL). Potential threshold voltage loss problem is successfully resolved to ensure the signal integrity. Despite the extra logic for dual-mode operations, the circuit complexity of the proposed design is comparable to those of the single mode designs. Simulations in different process corners and switching activities prove the competitive performance of proposed design against various single mode designs.
URL: https://global.ieice.org/en_transactions/fundamentals/10.1587/transfun.E93.A.2755/_p
Copy
@ARTICLE{e93-a_12_2755,
author={Jin-Fa LIN, Yin-Tshung HWANG, Ming-Hwa SHEU, },
journal={IEICE TRANSACTIONS on Fundamentals},
title={A Low Complexity Dual-Mode Pulse-Triggered Flip-Flop Design Based on Unified AND/XNOR Logic},
year={2010},
volume={E93-A},
number={12},
pages={2755-2757},
abstract={A dual-mode pulse-triggered flip-flop design supporting functional versatility is presented. A low-complexity unified logic module, consisting of only five transistors, for dual-mode pulse generation is devised using pass transistor logic (PTL). Potential threshold voltage loss problem is successfully resolved to ensure the signal integrity. Despite the extra logic for dual-mode operations, the circuit complexity of the proposed design is comparable to those of the single mode designs. Simulations in different process corners and switching activities prove the competitive performance of proposed design against various single mode designs.},
keywords={},
doi={10.1587/transfun.E93.A.2755},
ISSN={1745-1337},
month={December},}
Copy
TY - JOUR
TI - A Low Complexity Dual-Mode Pulse-Triggered Flip-Flop Design Based on Unified AND/XNOR Logic
T2 - IEICE TRANSACTIONS on Fundamentals
SP - 2755
EP - 2757
AU - Jin-Fa LIN
AU - Yin-Tshung HWANG
AU - Ming-Hwa SHEU
PY - 2010
DO - 10.1587/transfun.E93.A.2755
JO - IEICE TRANSACTIONS on Fundamentals
SN - 1745-1337
VL - E93-A
IS - 12
JA - IEICE TRANSACTIONS on Fundamentals
Y1 - December 2010
AB - A dual-mode pulse-triggered flip-flop design supporting functional versatility is presented. A low-complexity unified logic module, consisting of only five transistors, for dual-mode pulse generation is devised using pass transistor logic (PTL). Potential threshold voltage loss problem is successfully resolved to ensure the signal integrity. Despite the extra logic for dual-mode operations, the circuit complexity of the proposed design is comparable to those of the single mode designs. Simulations in different process corners and switching activities prove the competitive performance of proposed design against various single mode designs.
ER -
English
