A Locality-Aware Hybrid NoC Configuration Algorithm Utilizing the Communication Volume among IP Cores

Seungju LEE; Masao YANAGISAWA; Nozomu TOGAWA

doi:10.1587/transfun.E95.A.1538

A Locality-Aware Hybrid NoC Configuration Algorithm Utilizing the Communication Volume among IP Cores

Seungju LEE, Masao YANAGISAWA, Nozomu TOGAWA

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Network-on-chip (NoC) architectures have emerged as a promising solution to the lack of scalability in multi-processor systems-on-chips (MPSoCs). With the explosive growth in the usage of multimedia applications, it is expected that NoC serves as a multimedia server supporting multi-class services. In this paper, we propose a configuration algorithm for a hybrid bus-NoC architecture together with simulation results. Our target architecture is a hybrid bus-NoC architecture, called busmesh NoC, which is a generalized version of a hybrid NoC with local buses. In our BMNoC configuration algorithm, cores which have a heavy communication volume between them are mapped in a cluster node (CN) and connected by a local bus. CNs can have communication with each other via edge switches (ESes) and mesh routers (MRs). With this hierarchical communication network, our proposed algorithm can improve the latency as compared with conventional methods. Several realistic applications applied to our algorithm illustrate the better performance than earlier studies and feasibility of our proposed algorithm.

Publication: IEICE TRANSACTIONS on Fundamentals Vol.E95-A No.9 pp.1538-1549

Publication Date: 2012/09/01

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Online ISSN: 1745-1337

DOI: 10.1587/transfun.E95.A.1538

Type of Manuscript: PAPER

Category: VLSI Design Technology and CAD

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Seungju LEE, Masao YANAGISAWA, Nozomu TOGAWA, "A Locality-Aware Hybrid NoC Configuration Algorithm Utilizing the Communication Volume among IP Cores" in IEICE TRANSACTIONS on Fundamentals, vol. E95-A, no. 9, pp. 1538-1549, September 2012, doi: 10.1587/transfun.E95.A.1538.
Abstract: Network-on-chip (NoC) architectures have emerged as a promising solution to the lack of scalability in multi-processor systems-on-chips (MPSoCs). With the explosive growth in the usage of multimedia applications, it is expected that NoC serves as a multimedia server supporting multi-class services. In this paper, we propose a configuration algorithm for a hybrid bus-NoC architecture together with simulation results. Our target architecture is a hybrid bus-NoC architecture, called busmesh NoC, which is a generalized version of a hybrid NoC with local buses. In our BMNoC configuration algorithm, cores which have a heavy communication volume between them are mapped in a cluster node (CN) and connected by a local bus. CNs can have communication with each other via edge switches (ESes) and mesh routers (MRs). With this hierarchical communication network, our proposed algorithm can improve the latency as compared with conventional methods. Several realistic applications applied to our algorithm illustrate the better performance than earlier studies and feasibility of our proposed algorithm.
URL: https://global.ieice.org/en_transactions/fundamentals/10.1587/transfun.E95.A.1538/_p

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@ARTICLE{e95-a_9_1538,
author={Seungju LEE, Masao YANAGISAWA, Nozomu TOGAWA, },
journal={IEICE TRANSACTIONS on Fundamentals},
title={A Locality-Aware Hybrid NoC Configuration Algorithm Utilizing the Communication Volume among IP Cores},
year={2012},
volume={E95-A},
number={9},
pages={1538-1549},
abstract={Network-on-chip (NoC) architectures have emerged as a promising solution to the lack of scalability in multi-processor systems-on-chips (MPSoCs). With the explosive growth in the usage of multimedia applications, it is expected that NoC serves as a multimedia server supporting multi-class services. In this paper, we propose a configuration algorithm for a hybrid bus-NoC architecture together with simulation results. Our target architecture is a hybrid bus-NoC architecture, called busmesh NoC, which is a generalized version of a hybrid NoC with local buses. In our BMNoC configuration algorithm, cores which have a heavy communication volume between them are mapped in a cluster node (CN) and connected by a local bus. CNs can have communication with each other via edge switches (ESes) and mesh routers (MRs). With this hierarchical communication network, our proposed algorithm can improve the latency as compared with conventional methods. Several realistic applications applied to our algorithm illustrate the better performance than earlier studies and feasibility of our proposed algorithm.},
keywords={},
doi={10.1587/transfun.E95.A.1538},
ISSN={1745-1337},
month={September},}

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TY - JOUR
TI - A Locality-Aware Hybrid NoC Configuration Algorithm Utilizing the Communication Volume among IP Cores
T2 - IEICE TRANSACTIONS on Fundamentals
SP - 1538
EP - 1549
AU - Seungju LEE
AU - Masao YANAGISAWA
AU - Nozomu TOGAWA
PY - 2012
DO - 10.1587/transfun.E95.A.1538
JO - IEICE TRANSACTIONS on Fundamentals
SN - 1745-1337
VL - E95-A
IS - 9
JA - IEICE TRANSACTIONS on Fundamentals
Y1 - September 2012
AB - Network-on-chip (NoC) architectures have emerged as a promising solution to the lack of scalability in multi-processor systems-on-chips (MPSoCs). With the explosive growth in the usage of multimedia applications, it is expected that NoC serves as a multimedia server supporting multi-class services. In this paper, we propose a configuration algorithm for a hybrid bus-NoC architecture together with simulation results. Our target architecture is a hybrid bus-NoC architecture, called busmesh NoC, which is a generalized version of a hybrid NoC with local buses. In our BMNoC configuration algorithm, cores which have a heavy communication volume between them are mapped in a cluster node (CN) and connected by a local bus. CNs can have communication with each other via edge switches (ESes) and mesh routers (MRs). With this hierarchical communication network, our proposed algorithm can improve the latency as compared with conventional methods. Several realistic applications applied to our algorithm illustrate the better performance than earlier studies and feasibility of our proposed algorithm.
ER -