Scan-based side channel attack on hardware implementations of cryptographic algorithms has shown its great security threat. Unlike existing scan-based attacks, in our work we observed that instead of the secret-related-registers, some non-secret registers also carry the potential of being misused to help a hacker to retrieve secret keys. In this paper, we first present a scan-based side channel attack method on AES by making use of the round counter registers, which are not paid attention to in previous works, to show the potential security threat in designs with scan chains. And then we discussed the issues of secure DFT requirements and proposed a secure scan scheme to preserve all the advantages and simplicities of traditional scan test, while significantly improve the security with ignorable design overhead, for crypto hardware implementations.
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Youhua SHI, Nozomu TOGAWA, Masao YANAGISAWA, "Scan-Based Attack on AES through Round Registers and Its Countermeasure" in IEICE TRANSACTIONS on Fundamentals,
vol. E95-A, no. 12, pp. 2338-2346, December 2012, doi: 10.1587/transfun.E95.A.2338.
Abstract: Scan-based side channel attack on hardware implementations of cryptographic algorithms has shown its great security threat. Unlike existing scan-based attacks, in our work we observed that instead of the secret-related-registers, some non-secret registers also carry the potential of being misused to help a hacker to retrieve secret keys. In this paper, we first present a scan-based side channel attack method on AES by making use of the round counter registers, which are not paid attention to in previous works, to show the potential security threat in designs with scan chains. And then we discussed the issues of secure DFT requirements and proposed a secure scan scheme to preserve all the advantages and simplicities of traditional scan test, while significantly improve the security with ignorable design overhead, for crypto hardware implementations.
URL: https://global.ieice.org/en_transactions/fundamentals/10.1587/transfun.E95.A.2338/_p
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@ARTICLE{e95-a_12_2338,
author={Youhua SHI, Nozomu TOGAWA, Masao YANAGISAWA, },
journal={IEICE TRANSACTIONS on Fundamentals},
title={Scan-Based Attack on AES through Round Registers and Its Countermeasure},
year={2012},
volume={E95-A},
number={12},
pages={2338-2346},
abstract={Scan-based side channel attack on hardware implementations of cryptographic algorithms has shown its great security threat. Unlike existing scan-based attacks, in our work we observed that instead of the secret-related-registers, some non-secret registers also carry the potential of being misused to help a hacker to retrieve secret keys. In this paper, we first present a scan-based side channel attack method on AES by making use of the round counter registers, which are not paid attention to in previous works, to show the potential security threat in designs with scan chains. And then we discussed the issues of secure DFT requirements and proposed a secure scan scheme to preserve all the advantages and simplicities of traditional scan test, while significantly improve the security with ignorable design overhead, for crypto hardware implementations.},
keywords={},
doi={10.1587/transfun.E95.A.2338},
ISSN={1745-1337},
month={December},}
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TY - JOUR
TI - Scan-Based Attack on AES through Round Registers and Its Countermeasure
T2 - IEICE TRANSACTIONS on Fundamentals
SP - 2338
EP - 2346
AU - Youhua SHI
AU - Nozomu TOGAWA
AU - Masao YANAGISAWA
PY - 2012
DO - 10.1587/transfun.E95.A.2338
JO - IEICE TRANSACTIONS on Fundamentals
SN - 1745-1337
VL - E95-A
IS - 12
JA - IEICE TRANSACTIONS on Fundamentals
Y1 - December 2012
AB - Scan-based side channel attack on hardware implementations of cryptographic algorithms has shown its great security threat. Unlike existing scan-based attacks, in our work we observed that instead of the secret-related-registers, some non-secret registers also carry the potential of being misused to help a hacker to retrieve secret keys. In this paper, we first present a scan-based side channel attack method on AES by making use of the round counter registers, which are not paid attention to in previous works, to show the potential security threat in designs with scan chains. And then we discussed the issues of secure DFT requirements and proposed a secure scan scheme to preserve all the advantages and simplicities of traditional scan test, while significantly improve the security with ignorable design overhead, for crypto hardware implementations.
ER -