IEICE TRANSACTIONS on Fundamentals
Parallelization of Computing-Intensive Tasks of SIFT Algorithm on a Reconfigurable Architecture System
Summary :
Scale Invariant Feature Transform (SIFT) algorithm is a very excellent approach for feature detection. It is characterized by data intensive computation. The current studies of accelerating SIFT algorithm are mainly reflected in three aspects: optimizing the parallel parts of the algorithm based on general-purpose multi-core processors, designing the customized multi-core processor dedicated for SIFT, and implementing it based on the FPGA platform. The real-time performance of SIFT has been highly improved. However, the factors such as the input image size, the number of octaves and scale factors in the SIFT algorithm are restricted for some solutions, the flexibility that ensures the high execution performance under variable factors should be improved. This paper proposes a reconfigurable solution to solve this problem. We fully exploit the algorithm and adopt several techniques, such as full parallel execution, block computation and CORDIC transformation, etc., to improve the execution efficiency on a REconfigurable MUltimedia System called REMUS. Experimental results show that the execution performance of the SIFT is improved by 33%, 50% and 8 times comparing with that executed in the multi-core platform, FPGA and ASIC separately. The scheme of dynamic reconfiguration in this work can configure the circuits to meet the computation requirements under different input image size, different number of octaves and scale factors in the process of computing.
- Publication
- IEICE TRANSACTIONS on Fundamentals Vol.E96-A No.6 pp.1393-1402
- Publication Date
- 2013/06/01
- Publicized
- Online ISSN
- 1745-1337
- DOI
- 10.1587/transfun.E96.A.1393
- Type of Manuscript
- Special Section PAPER (Special Section on Circuit, System, and Computer Technologies)
- Category
Authors
Peng OUYANG
Tsinghua University
Shouyi YIN
Tsinghua University
Hui GAO
Tsinghua University
Leibo LIU
Tsinghua University
Shaojun WEI
Tsinghua University
Keyword
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Peng OUYANG, Shouyi YIN, Hui GAO, Leibo LIU, Shaojun WEI, "Parallelization of Computing-Intensive Tasks of SIFT Algorithm on a Reconfigurable Architecture System" in IEICE TRANSACTIONS on Fundamentals,
vol. E96-A, no. 6, pp. 1393-1402, June 2013, doi: 10.1587/transfun.E96.A.1393.
Abstract: Scale Invariant Feature Transform (SIFT) algorithm is a very excellent approach for feature detection. It is characterized by data intensive computation. The current studies of accelerating SIFT algorithm are mainly reflected in three aspects: optimizing the parallel parts of the algorithm based on general-purpose multi-core processors, designing the customized multi-core processor dedicated for SIFT, and implementing it based on the FPGA platform. The real-time performance of SIFT has been highly improved. However, the factors such as the input image size, the number of octaves and scale factors in the SIFT algorithm are restricted for some solutions, the flexibility that ensures the high execution performance under variable factors should be improved. This paper proposes a reconfigurable solution to solve this problem. We fully exploit the algorithm and adopt several techniques, such as full parallel execution, block computation and CORDIC transformation, etc., to improve the execution efficiency on a REconfigurable MUltimedia System called REMUS. Experimental results show that the execution performance of the SIFT is improved by 33%, 50% and 8 times comparing with that executed in the multi-core platform, FPGA and ASIC separately. The scheme of dynamic reconfiguration in this work can configure the circuits to meet the computation requirements under different input image size, different number of octaves and scale factors in the process of computing.
URL: https://global.ieice.org/en_transactions/fundamentals/10.1587/transfun.E96.A.1393/_p
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@ARTICLE{e96-a_6_1393,
author={Peng OUYANG, Shouyi YIN, Hui GAO, Leibo LIU, Shaojun WEI, },
journal={IEICE TRANSACTIONS on Fundamentals},
title={Parallelization of Computing-Intensive Tasks of SIFT Algorithm on a Reconfigurable Architecture System},
year={2013},
volume={E96-A},
number={6},
pages={1393-1402},
abstract={Scale Invariant Feature Transform (SIFT) algorithm is a very excellent approach for feature detection. It is characterized by data intensive computation. The current studies of accelerating SIFT algorithm are mainly reflected in three aspects: optimizing the parallel parts of the algorithm based on general-purpose multi-core processors, designing the customized multi-core processor dedicated for SIFT, and implementing it based on the FPGA platform. The real-time performance of SIFT has been highly improved. However, the factors such as the input image size, the number of octaves and scale factors in the SIFT algorithm are restricted for some solutions, the flexibility that ensures the high execution performance under variable factors should be improved. This paper proposes a reconfigurable solution to solve this problem. We fully exploit the algorithm and adopt several techniques, such as full parallel execution, block computation and CORDIC transformation, etc., to improve the execution efficiency on a REconfigurable MUltimedia System called REMUS. Experimental results show that the execution performance of the SIFT is improved by 33%, 50% and 8 times comparing with that executed in the multi-core platform, FPGA and ASIC separately. The scheme of dynamic reconfiguration in this work can configure the circuits to meet the computation requirements under different input image size, different number of octaves and scale factors in the process of computing.},
keywords={},
doi={10.1587/transfun.E96.A.1393},
ISSN={1745-1337},
month={June},}
Copy
TY - JOUR
TI - Parallelization of Computing-Intensive Tasks of SIFT Algorithm on a Reconfigurable Architecture System
T2 - IEICE TRANSACTIONS on Fundamentals
SP - 1393
EP - 1402
AU - Peng OUYANG
AU - Shouyi YIN
AU - Hui GAO
AU - Leibo LIU
AU - Shaojun WEI
PY - 2013
DO - 10.1587/transfun.E96.A.1393
JO - IEICE TRANSACTIONS on Fundamentals
SN - 1745-1337
VL - E96-A
IS - 6
JA - IEICE TRANSACTIONS on Fundamentals
Y1 - June 2013
AB - Scale Invariant Feature Transform (SIFT) algorithm is a very excellent approach for feature detection. It is characterized by data intensive computation. The current studies of accelerating SIFT algorithm are mainly reflected in three aspects: optimizing the parallel parts of the algorithm based on general-purpose multi-core processors, designing the customized multi-core processor dedicated for SIFT, and implementing it based on the FPGA platform. The real-time performance of SIFT has been highly improved. However, the factors such as the input image size, the number of octaves and scale factors in the SIFT algorithm are restricted for some solutions, the flexibility that ensures the high execution performance under variable factors should be improved. This paper proposes a reconfigurable solution to solve this problem. We fully exploit the algorithm and adopt several techniques, such as full parallel execution, block computation and CORDIC transformation, etc., to improve the execution efficiency on a REconfigurable MUltimedia System called REMUS. Experimental results show that the execution performance of the SIFT is improved by 33%, 50% and 8 times comparing with that executed in the multi-core platform, FPGA and ASIC separately. The scheme of dynamic reconfiguration in this work can configure the circuits to meet the computation requirements under different input image size, different number of octaves and scale factors in the process of computing.
ER -
English
