IEICE TRANSACTIONS on Fundamentals
Heuristic and Exact Resource Binding Algorithms for Storage Optimization Using Flip-Flops and Latches
Summary :
A mixed storage-type design using flip-flops and latches (FF/latch-based design) has advantages on such as area and power compared to single storage-type design (only flip-flops or latches). Considering FF/latch-based design at high-level synthesis is necessary, because resource binding process significantly affects the quality of resulting circuits. One of the fundamental aspects in FF/latch-based design is that different resource binding solutions could lead to the different numbers of latch-replacable registers. Therefore, as a first step, this paper addresses a datapath design problem in which resource binding and selecting storage-types of registers are simultaneously optimized for datapath area minimization (i.e., latch replacement maximization). An efficient algorithm based on the compatibility path decomposition and an integer linear programming-based exact approach are presented. Experiments confirm the effectiveness of the proposed approaches.
- Publication
- IEICE TRANSACTIONS on Fundamentals Vol.E96-A No.8 pp.1712-1722
- Publication Date
- 2013/08/01
- Publicized
- Online ISSN
- 1745-1337
- DOI
- 10.1587/transfun.E96.A.1712
- Type of Manuscript
- PAPER
- Category
- VLSI Design Technology and CAD
Authors
Keisuke INOUE
Kanazawa Technical College (KTC)
Mineo KANEKO
Japan Advanced Institute of Science and Technology (JAIST)
Keyword
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Keisuke INOUE, Mineo KANEKO, "Heuristic and Exact Resource Binding Algorithms for Storage Optimization Using Flip-Flops and Latches" in IEICE TRANSACTIONS on Fundamentals,
vol. E96-A, no. 8, pp. 1712-1722, August 2013, doi: 10.1587/transfun.E96.A.1712.
Abstract: A mixed storage-type design using flip-flops and latches (FF/latch-based design) has advantages on such as area and power compared to single storage-type design (only flip-flops or latches). Considering FF/latch-based design at high-level synthesis is necessary, because resource binding process significantly affects the quality of resulting circuits. One of the fundamental aspects in FF/latch-based design is that different resource binding solutions could lead to the different numbers of latch-replacable registers. Therefore, as a first step, this paper addresses a datapath design problem in which resource binding and selecting storage-types of registers are simultaneously optimized for datapath area minimization (i.e., latch replacement maximization). An efficient algorithm based on the compatibility path decomposition and an integer linear programming-based exact approach are presented. Experiments confirm the effectiveness of the proposed approaches.
URL: https://global.ieice.org/en_transactions/fundamentals/10.1587/transfun.E96.A.1712/_p
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@ARTICLE{e96-a_8_1712,
author={Keisuke INOUE, Mineo KANEKO, },
journal={IEICE TRANSACTIONS on Fundamentals},
title={Heuristic and Exact Resource Binding Algorithms for Storage Optimization Using Flip-Flops and Latches},
year={2013},
volume={E96-A},
number={8},
pages={1712-1722},
abstract={A mixed storage-type design using flip-flops and latches (FF/latch-based design) has advantages on such as area and power compared to single storage-type design (only flip-flops or latches). Considering FF/latch-based design at high-level synthesis is necessary, because resource binding process significantly affects the quality of resulting circuits. One of the fundamental aspects in FF/latch-based design is that different resource binding solutions could lead to the different numbers of latch-replacable registers. Therefore, as a first step, this paper addresses a datapath design problem in which resource binding and selecting storage-types of registers are simultaneously optimized for datapath area minimization (i.e., latch replacement maximization). An efficient algorithm based on the compatibility path decomposition and an integer linear programming-based exact approach are presented. Experiments confirm the effectiveness of the proposed approaches.},
keywords={},
doi={10.1587/transfun.E96.A.1712},
ISSN={1745-1337},
month={August},}
Copy
TY - JOUR
TI - Heuristic and Exact Resource Binding Algorithms for Storage Optimization Using Flip-Flops and Latches
T2 - IEICE TRANSACTIONS on Fundamentals
SP - 1712
EP - 1722
AU - Keisuke INOUE
AU - Mineo KANEKO
PY - 2013
DO - 10.1587/transfun.E96.A.1712
JO - IEICE TRANSACTIONS on Fundamentals
SN - 1745-1337
VL - E96-A
IS - 8
JA - IEICE TRANSACTIONS on Fundamentals
Y1 - August 2013
AB - A mixed storage-type design using flip-flops and latches (FF/latch-based design) has advantages on such as area and power compared to single storage-type design (only flip-flops or latches). Considering FF/latch-based design at high-level synthesis is necessary, because resource binding process significantly affects the quality of resulting circuits. One of the fundamental aspects in FF/latch-based design is that different resource binding solutions could lead to the different numbers of latch-replacable registers. Therefore, as a first step, this paper addresses a datapath design problem in which resource binding and selecting storage-types of registers are simultaneously optimized for datapath area minimization (i.e., latch replacement maximization). An efficient algorithm based on the compatibility path decomposition and an integer linear programming-based exact approach are presented. Experiments confirm the effectiveness of the proposed approaches.
ER -
English
