High Performance NAND Flash Memory System with a Data Buffer

Jung-Hoon LEE; Bo-Sung JUNG

doi:10.1587/transfun.E96.A.2645

High Performance NAND Flash Memory System with a Data Buffer

Jung-Hoon LEE, Bo-Sung JUNG

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The objective of this research is to design a high-performance NAND flash memory system with a data buffer. The proposed buffer system in the NAND flash memory consists of two parts, i.e., a fully associative temporal buffer for temporal locality and a fully associative spatial buffer for spatial locality. We propose a new operating mechanism for reducing overhead of flash memory, that is, erase and write operations. According to our simulation results, the proposed buffer system can reduce the write and erase operations by about 73% and 79% for spec application respectively, compared with a fully associative buffer with two times more space. Futhermore, the average memory access time can improve by about 60% compared with other large buffer systems.

Publication: IEICE TRANSACTIONS on Fundamentals Vol.E96-A No.12 pp.2645-2651

Publication Date: 2013/12/01

Publicized

Online ISSN: 1745-1337

DOI: 10.1587/transfun.E96.A.2645

Type of Manuscript: Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)

Category: High-Level Synthesis and System-Level Design

Authors

Jung-Hoon LEE
GyeongSang National University
Bo-Sung JUNG
GyeongSang National University

Keyword

NAND flash memory, buffer system, memory locality, multimedia and general applications

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Jung-Hoon LEE, Bo-Sung JUNG, "High Performance NAND Flash Memory System with a Data Buffer" in IEICE TRANSACTIONS on Fundamentals, vol. E96-A, no. 12, pp. 2645-2651, December 2013, doi: 10.1587/transfun.E96.A.2645.
Abstract: The objective of this research is to design a high-performance NAND flash memory system with a data buffer. The proposed buffer system in the NAND flash memory consists of two parts, i.e., a fully associative temporal buffer for temporal locality and a fully associative spatial buffer for spatial locality. We propose a new operating mechanism for reducing overhead of flash memory, that is, erase and write operations. According to our simulation results, the proposed buffer system can reduce the write and erase operations by about 73% and 79% for spec application respectively, compared with a fully associative buffer with two times more space. Futhermore, the average memory access time can improve by about 60% compared with other large buffer systems.
URL: https://global.ieice.org/en_transactions/fundamentals/10.1587/transfun.E96.A.2645/_p

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@ARTICLE{e96-a_12_2645,
author={Jung-Hoon LEE, Bo-Sung JUNG, },
journal={IEICE TRANSACTIONS on Fundamentals},
title={High Performance NAND Flash Memory System with a Data Buffer},
year={2013},
volume={E96-A},
number={12},
pages={2645-2651},
abstract={The objective of this research is to design a high-performance NAND flash memory system with a data buffer. The proposed buffer system in the NAND flash memory consists of two parts, i.e., a fully associative temporal buffer for temporal locality and a fully associative spatial buffer for spatial locality. We propose a new operating mechanism for reducing overhead of flash memory, that is, erase and write operations. According to our simulation results, the proposed buffer system can reduce the write and erase operations by about 73% and 79% for spec application respectively, compared with a fully associative buffer with two times more space. Futhermore, the average memory access time can improve by about 60% compared with other large buffer systems.},
keywords={},
doi={10.1587/transfun.E96.A.2645},
ISSN={1745-1337},
month={December},}

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TY - JOUR
TI - High Performance NAND Flash Memory System with a Data Buffer
T2 - IEICE TRANSACTIONS on Fundamentals
SP - 2645
EP - 2651
AU - Jung-Hoon LEE
AU - Bo-Sung JUNG
PY - 2013
DO - 10.1587/transfun.E96.A.2645
JO - IEICE TRANSACTIONS on Fundamentals
SN - 1745-1337
VL - E96-A
IS - 12
JA - IEICE TRANSACTIONS on Fundamentals
Y1 - December 2013
AB - The objective of this research is to design a high-performance NAND flash memory system with a data buffer. The proposed buffer system in the NAND flash memory consists of two parts, i.e., a fully associative temporal buffer for temporal locality and a fully associative spatial buffer for spatial locality. We propose a new operating mechanism for reducing overhead of flash memory, that is, erase and write operations. According to our simulation results, the proposed buffer system can reduce the write and erase operations by about 73% and 79% for spec application respectively, compared with a fully associative buffer with two times more space. Futhermore, the average memory access time can improve by about 60% compared with other large buffer systems.
ER -