Temperature-Aware Layer Assignment for Three-Dimensional Integrated Circuits
Summary :
Because dielectrics between active layers have low thermal conductivities, there is a demand to reduce the temperature increase in three-dimensional integrated circuits (3D ICs). This paper demonstrates that, in the design of 3D ICs, different layer assignments often lead to different temperature increases. Based on this observation, we are motivated to perform temperature-aware layer assignment. Our work includes two parts. Firstly, an integer linear programming (ILP) approach that guarantees a minimum temperature increase is proposed. Secondly, a polynomial-time heuristic algorithm that reduces the temperature increase is proposed. Compared with the previous work, which does not take the temperature increase into account, the experimental results show that both our ILP approach and our heuristic algorithm produce a significant reduction in the temperature increase with a very small area overhead.
- Publication
- IEICE TRANSACTIONS on Fundamentals Vol.E97-A No.8 pp.1699-1708
- Publication Date
- 2014/08/01
- Publicized
- Online ISSN
- 1745-1337
- DOI
- 10.1587/transfun.E97.A.1699
- Type of Manuscript
- PAPER
- Category
- VLSI Design Technology and CAD
Authors
Shih-Hsu HUANG
Chung Yuan Christian University
Hua-Hsin YEH
Chung Yuan Christian University
Keyword
Latest Issue
Copyrights notice of machine-translated contents
The copyright of the original papers published on this site belongs to IEICE. Unauthorized use of the original or translated papers is prohibited. See IEICE Provisions on Copyright for details.
Cite this
Copy
Shih-Hsu HUANG, Hua-Hsin YEH, "Temperature-Aware Layer Assignment for Three-Dimensional Integrated Circuits" in IEICE TRANSACTIONS on Fundamentals,
vol. E97-A, no. 8, pp. 1699-1708, August 2014, doi: 10.1587/transfun.E97.A.1699.
Abstract: Because dielectrics between active layers have low thermal conductivities, there is a demand to reduce the temperature increase in three-dimensional integrated circuits (3D ICs). This paper demonstrates that, in the design of 3D ICs, different layer assignments often lead to different temperature increases. Based on this observation, we are motivated to perform temperature-aware layer assignment. Our work includes two parts. Firstly, an integer linear programming (ILP) approach that guarantees a minimum temperature increase is proposed. Secondly, a polynomial-time heuristic algorithm that reduces the temperature increase is proposed. Compared with the previous work, which does not take the temperature increase into account, the experimental results show that both our ILP approach and our heuristic algorithm produce a significant reduction in the temperature increase with a very small area overhead.
URL: https://global.ieice.org/en_transactions/fundamentals/10.1587/transfun.E97.A.1699/_p
Copy
@ARTICLE{e97-a_8_1699,
author={Shih-Hsu HUANG, Hua-Hsin YEH, },
journal={IEICE TRANSACTIONS on Fundamentals},
title={Temperature-Aware Layer Assignment for Three-Dimensional Integrated Circuits},
year={2014},
volume={E97-A},
number={8},
pages={1699-1708},
abstract={Because dielectrics between active layers have low thermal conductivities, there is a demand to reduce the temperature increase in three-dimensional integrated circuits (3D ICs). This paper demonstrates that, in the design of 3D ICs, different layer assignments often lead to different temperature increases. Based on this observation, we are motivated to perform temperature-aware layer assignment. Our work includes two parts. Firstly, an integer linear programming (ILP) approach that guarantees a minimum temperature increase is proposed. Secondly, a polynomial-time heuristic algorithm that reduces the temperature increase is proposed. Compared with the previous work, which does not take the temperature increase into account, the experimental results show that both our ILP approach and our heuristic algorithm produce a significant reduction in the temperature increase with a very small area overhead.},
keywords={},
doi={10.1587/transfun.E97.A.1699},
ISSN={1745-1337},
month={August},}
Copy
TY - JOUR
TI - Temperature-Aware Layer Assignment for Three-Dimensional Integrated Circuits
T2 - IEICE TRANSACTIONS on Fundamentals
SP - 1699
EP - 1708
AU - Shih-Hsu HUANG
AU - Hua-Hsin YEH
PY - 2014
DO - 10.1587/transfun.E97.A.1699
JO - IEICE TRANSACTIONS on Fundamentals
SN - 1745-1337
VL - E97-A
IS - 8
JA - IEICE TRANSACTIONS on Fundamentals
Y1 - August 2014
AB - Because dielectrics between active layers have low thermal conductivities, there is a demand to reduce the temperature increase in three-dimensional integrated circuits (3D ICs). This paper demonstrates that, in the design of 3D ICs, different layer assignments often lead to different temperature increases. Based on this observation, we are motivated to perform temperature-aware layer assignment. Our work includes two parts. Firstly, an integer linear programming (ILP) approach that guarantees a minimum temperature increase is proposed. Secondly, a polynomial-time heuristic algorithm that reduces the temperature increase is proposed. Compared with the previous work, which does not take the temperature increase into account, the experimental results show that both our ILP approach and our heuristic algorithm produce a significant reduction in the temperature increase with a very small area overhead.
ER -
English
