IEICE TRANSACTIONS on Fundamentals
Synthesis Algorithm for Parallel Index Generator
Summary :
The index generation function is a multi-valued logic function which checks if the given input vector is a registered or not, and returns its index value if the vector is registered. If the latency of the operation is critical, dedicated hardware is used for implementing the index generation functions. This paper proposes a method implementing the index generation functions using parallel index generator. A novel and efficient algorithm called ‘conflict free partitioning’ is proposed to synthesize parallel index generators. Experimental results show the proposed method outperforms other existing methods. Also, A novel architecture of index generator which is suitable for parallelized implementation is introduced. A new architecture has advantages in the sense of both area and delay.
- Publication
- IEICE TRANSACTIONS on Fundamentals Vol.E97-A No.12 pp.2451-2458
- Publication Date
- 2014/12/01
- Publicized
- Online ISSN
- 1745-1337
- DOI
- 10.1587/transfun.E97.A.2451
- Type of Manuscript
- Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
- Category
- Logic Synthesis, Test and Verification
Authors
Yusuke MATSUNAGA
Kyushu University
Keyword
Latest Issue
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Yusuke MATSUNAGA, "Synthesis Algorithm for Parallel Index Generator" in IEICE TRANSACTIONS on Fundamentals,
vol. E97-A, no. 12, pp. 2451-2458, December 2014, doi: 10.1587/transfun.E97.A.2451.
Abstract: The index generation function is a multi-valued logic function which checks if the given input vector is a registered or not, and returns its index value if the vector is registered. If the latency of the operation is critical, dedicated hardware is used for implementing the index generation functions. This paper proposes a method implementing the index generation functions using parallel index generator. A novel and efficient algorithm called ‘conflict free partitioning’ is proposed to synthesize parallel index generators. Experimental results show the proposed method outperforms other existing methods. Also, A novel architecture of index generator which is suitable for parallelized implementation is introduced. A new architecture has advantages in the sense of both area and delay.
URL: https://global.ieice.org/en_transactions/fundamentals/10.1587/transfun.E97.A.2451/_p
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@ARTICLE{e97-a_12_2451,
author={Yusuke MATSUNAGA, },
journal={IEICE TRANSACTIONS on Fundamentals},
title={Synthesis Algorithm for Parallel Index Generator},
year={2014},
volume={E97-A},
number={12},
pages={2451-2458},
abstract={The index generation function is a multi-valued logic function which checks if the given input vector is a registered or not, and returns its index value if the vector is registered. If the latency of the operation is critical, dedicated hardware is used for implementing the index generation functions. This paper proposes a method implementing the index generation functions using parallel index generator. A novel and efficient algorithm called ‘conflict free partitioning’ is proposed to synthesize parallel index generators. Experimental results show the proposed method outperforms other existing methods. Also, A novel architecture of index generator which is suitable for parallelized implementation is introduced. A new architecture has advantages in the sense of both area and delay.},
keywords={},
doi={10.1587/transfun.E97.A.2451},
ISSN={1745-1337},
month={December},}
Copy
TY - JOUR
TI - Synthesis Algorithm for Parallel Index Generator
T2 - IEICE TRANSACTIONS on Fundamentals
SP - 2451
EP - 2458
AU - Yusuke MATSUNAGA
PY - 2014
DO - 10.1587/transfun.E97.A.2451
JO - IEICE TRANSACTIONS on Fundamentals
SN - 1745-1337
VL - E97-A
IS - 12
JA - IEICE TRANSACTIONS on Fundamentals
Y1 - December 2014
AB - The index generation function is a multi-valued logic function which checks if the given input vector is a registered or not, and returns its index value if the vector is registered. If the latency of the operation is critical, dedicated hardware is used for implementing the index generation functions. This paper proposes a method implementing the index generation functions using parallel index generator. A novel and efficient algorithm called ‘conflict free partitioning’ is proposed to synthesize parallel index generators. Experimental results show the proposed method outperforms other existing methods. Also, A novel architecture of index generator which is suitable for parallelized implementation is introduced. A new architecture has advantages in the sense of both area and delay.
ER -
English
