IEICE TRANSACTIONS on Fundamentals
One-Bit to Four-Bit Dual Conversion for Security Enhancement against Power Analysis
Summary :
Power analysis exploits the leaked information gained from cryptographic devices including, but not limited to, power consumption generated during cryptographic operations. If a number of power traces are given to an attacker, it is possible to reveal a cryptographic key efficiently, sometimes within a few minutes, using various statistical methods. In this sense, software countermeasures including higher-order masking or software dual-rail with precharge logic have been proposed to produce randomized or constant power consumption during the key-dependent operations. However, they have critical disadvantages in terms of computational time and security. In this paper, we propose a new solution called “one-bit to four-bit dual conversion” for enhanced security against power analysis. For an exemplary embodiment of the proposed scheme, we apply it to an AES implementation and demonstrate its security and performance. The overall costs are approximately 148KB memory space for the lookup tables and about a 3-fold increase in execution time than the straightforward implementation of AES.
- Publication
- IEICE TRANSACTIONS on Fundamentals Vol.E99-A No.10 pp.1833-1842
- Publication Date
- 2016/10/01
- Publicized
- Online ISSN
- 1745-1337
- DOI
- 10.1587/transfun.E99.A.1833
- Type of Manuscript
- PAPER
- Category
- Cryptography and Information Security
Authors
Seungkwang LEE
the ETRI (Electronics and Telecommunications Research Institute)
Nam-Su JHO
the ETRI (Electronics and Telecommunications Research Institute)
Keyword
Latest Issue
Copyrights notice of machine-translated contents
The copyright of the original papers published on this site belongs to IEICE. Unauthorized use of the original or translated papers is prohibited. See IEICE Provisions on Copyright for details.
Cite this
Copy
Seungkwang LEE, Nam-Su JHO, "One-Bit to Four-Bit Dual Conversion for Security Enhancement against Power Analysis" in IEICE TRANSACTIONS on Fundamentals,
vol. E99-A, no. 10, pp. 1833-1842, October 2016, doi: 10.1587/transfun.E99.A.1833.
Abstract: Power analysis exploits the leaked information gained from cryptographic devices including, but not limited to, power consumption generated during cryptographic operations. If a number of power traces are given to an attacker, it is possible to reveal a cryptographic key efficiently, sometimes within a few minutes, using various statistical methods. In this sense, software countermeasures including higher-order masking or software dual-rail with precharge logic have been proposed to produce randomized or constant power consumption during the key-dependent operations. However, they have critical disadvantages in terms of computational time and security. In this paper, we propose a new solution called “one-bit to four-bit dual conversion” for enhanced security against power analysis. For an exemplary embodiment of the proposed scheme, we apply it to an AES implementation and demonstrate its security and performance. The overall costs are approximately 148KB memory space for the lookup tables and about a 3-fold increase in execution time than the straightforward implementation of AES.
URL: https://global.ieice.org/en_transactions/fundamentals/10.1587/transfun.E99.A.1833/_p
Copy
@ARTICLE{e99-a_10_1833,
author={Seungkwang LEE, Nam-Su JHO, },
journal={IEICE TRANSACTIONS on Fundamentals},
title={One-Bit to Four-Bit Dual Conversion for Security Enhancement against Power Analysis},
year={2016},
volume={E99-A},
number={10},
pages={1833-1842},
abstract={Power analysis exploits the leaked information gained from cryptographic devices including, but not limited to, power consumption generated during cryptographic operations. If a number of power traces are given to an attacker, it is possible to reveal a cryptographic key efficiently, sometimes within a few minutes, using various statistical methods. In this sense, software countermeasures including higher-order masking or software dual-rail with precharge logic have been proposed to produce randomized or constant power consumption during the key-dependent operations. However, they have critical disadvantages in terms of computational time and security. In this paper, we propose a new solution called “one-bit to four-bit dual conversion” for enhanced security against power analysis. For an exemplary embodiment of the proposed scheme, we apply it to an AES implementation and demonstrate its security and performance. The overall costs are approximately 148KB memory space for the lookup tables and about a 3-fold increase in execution time than the straightforward implementation of AES.},
keywords={},
doi={10.1587/transfun.E99.A.1833},
ISSN={1745-1337},
month={October},}
Copy
TY - JOUR
TI - One-Bit to Four-Bit Dual Conversion for Security Enhancement against Power Analysis
T2 - IEICE TRANSACTIONS on Fundamentals
SP - 1833
EP - 1842
AU - Seungkwang LEE
AU - Nam-Su JHO
PY - 2016
DO - 10.1587/transfun.E99.A.1833
JO - IEICE TRANSACTIONS on Fundamentals
SN - 1745-1337
VL - E99-A
IS - 10
JA - IEICE TRANSACTIONS on Fundamentals
Y1 - October 2016
AB - Power analysis exploits the leaked information gained from cryptographic devices including, but not limited to, power consumption generated during cryptographic operations. If a number of power traces are given to an attacker, it is possible to reveal a cryptographic key efficiently, sometimes within a few minutes, using various statistical methods. In this sense, software countermeasures including higher-order masking or software dual-rail with precharge logic have been proposed to produce randomized or constant power consumption during the key-dependent operations. However, they have critical disadvantages in terms of computational time and security. In this paper, we propose a new solution called “one-bit to four-bit dual conversion” for enhanced security against power analysis. For an exemplary embodiment of the proposed scheme, we apply it to an AES implementation and demonstrate its security and performance. The overall costs are approximately 148KB memory space for the lookup tables and about a 3-fold increase in execution time than the straightforward implementation of AES.
ER -
English
