IEICE TRANSACTIONS on Fundamentals
Hardware-Efficient Local Extrema Detection for Scale-Space Extrema Detection in SIFT Algorithm
Summary :
In this paper a hardware-efficient local extrema detection (LED) method used for scale-space extrema detection in the SIFT algorithm is proposed. By reformulating the reuse of the intermediate results in taking the local maximum and minimum, the necessary operations in LED are reduced without degrading the detection accuracy. The proposed method requires 25% to 35% less logic resources than the conventional method when implemented in an FPGA with a slight increase in latency.
- Publication
- IEICE TRANSACTIONS on Fundamentals Vol.E99-A No.12 pp.2507-2510
- Publication Date
- 2016/12/01
- Publicized
- Online ISSN
- 1745-1337
- DOI
- 10.1587/transfun.E99.A.2507
- Type of Manuscript
- Special Section LETTER (Special Section on VLSI Design and CAD Algorithms)
- Category
Authors
Kazuhito ITO
Saitama University
Hiroki HAYASHI
Saitama University
Keyword
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Kazuhito ITO, Hiroki HAYASHI, "Hardware-Efficient Local Extrema Detection for Scale-Space Extrema Detection in SIFT Algorithm" in IEICE TRANSACTIONS on Fundamentals,
vol. E99-A, no. 12, pp. 2507-2510, December 2016, doi: 10.1587/transfun.E99.A.2507.
Abstract: In this paper a hardware-efficient local extrema detection (LED) method used for scale-space extrema detection in the SIFT algorithm is proposed. By reformulating the reuse of the intermediate results in taking the local maximum and minimum, the necessary operations in LED are reduced without degrading the detection accuracy. The proposed method requires 25% to 35% less logic resources than the conventional method when implemented in an FPGA with a slight increase in latency.
URL: https://global.ieice.org/en_transactions/fundamentals/10.1587/transfun.E99.A.2507/_p
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@ARTICLE{e99-a_12_2507,
author={Kazuhito ITO, Hiroki HAYASHI, },
journal={IEICE TRANSACTIONS on Fundamentals},
title={Hardware-Efficient Local Extrema Detection for Scale-Space Extrema Detection in SIFT Algorithm},
year={2016},
volume={E99-A},
number={12},
pages={2507-2510},
abstract={In this paper a hardware-efficient local extrema detection (LED) method used for scale-space extrema detection in the SIFT algorithm is proposed. By reformulating the reuse of the intermediate results in taking the local maximum and minimum, the necessary operations in LED are reduced without degrading the detection accuracy. The proposed method requires 25% to 35% less logic resources than the conventional method when implemented in an FPGA with a slight increase in latency.},
keywords={},
doi={10.1587/transfun.E99.A.2507},
ISSN={1745-1337},
month={December},}
Copy
TY - JOUR
TI - Hardware-Efficient Local Extrema Detection for Scale-Space Extrema Detection in SIFT Algorithm
T2 - IEICE TRANSACTIONS on Fundamentals
SP - 2507
EP - 2510
AU - Kazuhito ITO
AU - Hiroki HAYASHI
PY - 2016
DO - 10.1587/transfun.E99.A.2507
JO - IEICE TRANSACTIONS on Fundamentals
SN - 1745-1337
VL - E99-A
IS - 12
JA - IEICE TRANSACTIONS on Fundamentals
Y1 - December 2016
AB - In this paper a hardware-efficient local extrema detection (LED) method used for scale-space extrema detection in the SIFT algorithm is proposed. By reformulating the reuse of the intermediate results in taking the local maximum and minimum, the necessary operations in LED are reduced without degrading the detection accuracy. The proposed method requires 25% to 35% less logic resources than the conventional method when implemented in an FPGA with a slight increase in latency.
ER -
English
