This paper proposes a self-test method of coarse grain dynamically reconfigurable processors (DRPs) without hardware overhead. In the method, processor elements (PEs) compose a test frame, which consists of test pattern generators (TPGs), processor elements under test (PEUTs) and response analyzers (RAs), while testing themselves one another by changing test frames appropriately. We design several test frames with different structures, and discuss the relationship of the structures to the numbers of contexts and test frames for testing all the functions of PEs. A case study shows that there exists an optimal test frame which minimizes the test application time under a constraint.
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Tomoo INOUE, Takashi FUJII, Hideyuki ICHIHARA, "A Self-Test of Dynamically Reconfigurable Processors with Test Frames" in IEICE TRANSACTIONS on Information,
vol. E91-D, no. 3, pp. 756-762, March 2008, doi: 10.1093/ietisy/e91-d.3.756.
Abstract: This paper proposes a self-test method of coarse grain dynamically reconfigurable processors (DRPs) without hardware overhead. In the method, processor elements (PEs) compose a test frame, which consists of test pattern generators (TPGs), processor elements under test (PEUTs) and response analyzers (RAs), while testing themselves one another by changing test frames appropriately. We design several test frames with different structures, and discuss the relationship of the structures to the numbers of contexts and test frames for testing all the functions of PEs. A case study shows that there exists an optimal test frame which minimizes the test application time under a constraint.
URL: https://global.ieice.org/en_transactions/information/10.1093/ietisy/e91-d.3.756/_p
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@ARTICLE{e91-d_3_756,
author={Tomoo INOUE, Takashi FUJII, Hideyuki ICHIHARA, },
journal={IEICE TRANSACTIONS on Information},
title={A Self-Test of Dynamically Reconfigurable Processors with Test Frames},
year={2008},
volume={E91-D},
number={3},
pages={756-762},
abstract={This paper proposes a self-test method of coarse grain dynamically reconfigurable processors (DRPs) without hardware overhead. In the method, processor elements (PEs) compose a test frame, which consists of test pattern generators (TPGs), processor elements under test (PEUTs) and response analyzers (RAs), while testing themselves one another by changing test frames appropriately. We design several test frames with different structures, and discuss the relationship of the structures to the numbers of contexts and test frames for testing all the functions of PEs. A case study shows that there exists an optimal test frame which minimizes the test application time under a constraint.},
keywords={},
doi={10.1093/ietisy/e91-d.3.756},
ISSN={1745-1361},
month={March},}
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TY - JOUR
TI - A Self-Test of Dynamically Reconfigurable Processors with Test Frames
T2 - IEICE TRANSACTIONS on Information
SP - 756
EP - 762
AU - Tomoo INOUE
AU - Takashi FUJII
AU - Hideyuki ICHIHARA
PY - 2008
DO - 10.1093/ietisy/e91-d.3.756
JO - IEICE TRANSACTIONS on Information
SN - 1745-1361
VL - E91-D
IS - 3
JA - IEICE TRANSACTIONS on Information
Y1 - March 2008
AB - This paper proposes a self-test method of coarse grain dynamically reconfigurable processors (DRPs) without hardware overhead. In the method, processor elements (PEs) compose a test frame, which consists of test pattern generators (TPGs), processor elements under test (PEUTs) and response analyzers (RAs), while testing themselves one another by changing test frames appropriately. We design several test frames with different structures, and discuss the relationship of the structures to the numbers of contexts and test frames for testing all the functions of PEs. A case study shows that there exists an optimal test frame which minimizes the test application time under a constraint.
ER -